Drying Kinetics of a Porous Spherical Particle and the Inversion Temperature

A model is presented for drying of a single porous particle with superheated steam and humid air. Experimental data for spherical porous ceramic particle reported in the literature were used for the validation of the model. An inversion temperature at which the evaporation rates within superheated steam and humid air are equal was predicted. The effect of thermophysical properties of the particle (permeability 10^-14 - 10^-17 m², diameter 3 × 10^-3 - 10 × 10^-3 m) and operating variables (gas mass flux 0.26 - 0.78 kg m^-2 s^-1, drying agent temperature 120-200°C) is tested. The inversion temperature is shown to be affected by the thermophysical properties of the porous particle and of the drying agent.     

Robustness design of a dynamic output-feedback decentralized controller using <Emphasis Type="Italic">H</Emphasis><Subscript>∞</Subscript> synthesis and LMI paradigm

This paper proposes developing a H _∞ dynamic output-feedback decentralized control design method for nonlinear interconnected systems subject to time-varying parameters and external disturbances. The designed controller is formulated as an optimization problem subject to linear matrix inequalities (LMIs) for the concurrent computation of the decentralized observation and control gains, and for the external disturbance mitigation by means of a H _∞ performance criterion minimization. The propounded optimization problem, designed in LMI conditions, is expeditiously resolved by a one-step procedure to override the conservatism generated by using many step-based procedures often used in the analysis and synthesis of interconnected systems. The effectiveness of the developed control scheme is demonstrated through simulation results of multimachine power systems.     

Traps centers and deep defects contribution in current instabilities for AlGaN/GaN HEMT's on silicon and sapphire substrates

AlGaN/GaN high electron mobility transistors (HEMTs) with Si and Al₂O₃ substrates reveals anomalies on I_ds-V_ds-T and I_gs-V_gs-T characteristics (degradation in drain current, kink effect, barrier height fluctuations, etc.). Stress and random telegraph signal (RTS) measurements prove the presence of trap centers responsible for drain current degradation. An explanation of the trapping mechanism responsible for current instabilities is proposed. Deep defects analysis performed by capacitance transient spectroscopy (C-DLTS), frequency dispersion of the output conductance (G_ds(f)), respectively, on gate/source and drain/source contacts and RTS prove the presence of deep defects localized, respectively, in the gate and in the channel regions. Defects detected by C-DLTS and G_ds(f) are strongly correlated, respectively, to barrier height inhomogeneities and kink anomalies. Gate current analysis confirms the presence of (G-R) centers acting like traps at the interface GaN/AlGaN. Finally, the localization of these traps defects is proposed.     

A k‐means clustering‐based security framework for mobile data mining

Data mining is a process of digging data sets from large data‐bases, especially for use to improve the operation efficiency of a company, institution, or an organization. With the increasing cases of cyber and other computer‐related crimes, computer and mobile data security has become a matter of concern, secure, and non‐contaminated data is very important for data mining to improve the performance of a system. This paper proposes a system framework that is able to collect information and then be able to generate alerts in real time. The proposed scheme is then simulated using the K‐means clustering algorithm, which is one of the most popular clustering algorithms to determine the efficiency and the accuracy of the proposed scheme. The paper concludes by proposing further improvements to be undertaken on the proposed system to improve its efficiency and accuracy. Copyright © 2017 John Wiley & Sons, Ltd.     

Effect of a combined machining/burnishing tool on the roughness and mechanical properties

Burnishing is a cold working surface treatment process in which plastic deformation of surface irregularities occurs by exerting pressure through a very hard and a very smooth roller or ball on a surface to generate a uniform and work‐hardened surface. This treatment occurs generally after the machining process. In this study, a new combined machining/burnishing tool is designed and is fabricated. This tool allows for generating simultaneously the machining (turning) and the burnishing of the cylindrical surface using a turning machine. First, turned surfaces at different conditions, sketches, finishing and half finishing were performed using only the cutting tool. The evolutions of a surface roughness parameter and the technological time relative to every test condition have been investigated. Second, using the combined machining/burnishing tool at coarse conditions, the evolutions of the surface roughness and the technological time have been also investigated. A comparison among the parameters obtained under different machining conditions and those obtained using the combined machining/burnishing tool has been carried out. Moreover, the analyses of the layers obtained on the combined machined/burnished surface have shown that the burnishing process induces compressive residual stresses on the subsurface treated specimens. Copyright © 2013 John Wiley & Sons, Ltd.     

Study of trapping phenomenon in 4H-SiC MESFETs: dependence on substrate purity

This work demonstrates that the "purity", meaning the low density of electron traps in a semi-insulating (SI) SiC substrate, can be crucial for the electrical characteristics of 4H-SiC MESFETs. Structures realized on two types of SI substrates have been investigated. The first kind is vanadium doped substrates grown by the classical Physical Vapor Transport (PVT) sublimation technique. The second kind are extremely low vanadium content SI substrates grown by the high temperature CVD (HTCVD) technique. For all the transistors, I/sub d/-V/sub ds/ measurements have been performed as a function of temperature. Different parasitic effects have been observed on the static output characteristics in the case of PVT substrates. Frequency dispersion measurements of the transconductance and drain-source output conductance, have next been realized. The results give clear evidence of the presence of deep traps in the transistors realized on PVT substrates. Those traps have an activation energy of 1.05 eV and a capture cross section between 10/sup -18/ cm/sup -2/ and 10/sup -19/ cm/sup -2/. They are most probably related to vanadium. The correlation between the presence of these traps and the parasitic effects on the output characteristics is discussed and the trap localization in the structure is established. In the case of HTCVD very low vanadium substrates, no parasitic effect have been observed and the presence of traps was not detected by the different characterization techniques.     

Direct exchange between silicon nanocrystals and tunnel oxide traps under illumination on single electron photodetector

In this paper we present the trapping of photogenerated charge carriers for 300 s resulted by their direct exchange under illumination between a few silicon nanocrystals (ncs-Si) embedded in an oxide tunnel layer (SiO_x = 1.5) and the tunnel oxide traps levels for a single electron photodetector (photo-SET or nanopixel). At first place, the presence of a photocurrent limited in the inversion zone under illumination in the I–V curves confirms the creation of a pair electron/hole (e–h) at high energy. This photogenerated charge carriers can be trapped in the oxide. Using the capacitance-voltage under illumination (the photo-CV measurements) we show a hysteresis chargement limited in the inversion area, indicating that the photo-generated charge carriers are stored at traps levels at the interface and within ncs-Si. The direct exchange of the photogenerated charge carriers between the interface traps levels and the ncs-Si contributed on the photomemory effect for 300 s for our nanopixel at room temperature.