Exposed Die-Top Encapsulation Molding for an Improved High- Performance Flip Chip BGA Package

The recent advancement in high- performance semiconductor packages has been driven by the need for higher pin count and superior heat dissipation. A one-piece cavity lid flip chip ball grid array (BGA) package with high pin count and targeted reliability has emerged as a popular choice. The flip chip technology can accommodate an I/O count of more than five hundreds500, and the die junction temperature can be reduced to a minimum level by a metal heat spreader attachment. None the less, greater expectations on these high-performance packages arose such as better substrate real estate utilization for multiple chips, ease in handling for thinner core substrates, and improved board- level solder joint reliability. A new design of the flip chip BGA package has been looked into for meeting such requirements. By encapsulating the flip chip with molding compound leaving the die top exposed, a planar top surface can be formed. A, and a flat lid can then be mounted on the planar mold/die top surface. In this manner the direct interaction of the metal lid with the substrate can be removed. The new package is thus less rigid under thermal loading and solder joint reliability enhancement is expected. This paper discusses the process development of the new package and its advantages for improved solder joint fatigue life, and being a multichip package and thin core substrate options. Finite-element simulations have been employed for the study of its structural integrity, thermal, and electrical performances. Detailed package and board-level reliability test results will also be reported     

Numerical Study of Finite Element Method Based Solutions for Propagation of Wetting Fronts in Unsaturated Soil

The accurate prediction of the propagation of a wetting front in an unsaturated soil subjected to surficial infiltration is of practical importance to many geotechnical and geoenvironmental problems. The finite element method is the most common solution technique as the hydraulic soil properties are highly nonlinear. Two important issues are often found to create difficulties in such analyses. First, numerical oscillations are usually observed in the calculated pore pressures at the wetting front. Second, when a reasonable mesh size and time step are used, the elevation of the wetting front may be seriously overpredicted. This paper is focused on the second issue. The under-relaxation (UR) technique used in the iterative process within each time step is found to have a serious impact on rate of convergence with refinement in mesh size and time step. Two different techniques are typically used; the first evaluates the hydraulic conductivity using an average of heads calculated from the preceding time node and the most recent iteration of the current time node (UR1), and the second evaluates the hydraulic conductivity using the average of heads calculated from the two most recent iterations of the current time nodes (UR2). The study shows that UR1, which is adopted in programs such as SEEP/W, ensures that the solution converges rapidly to a stable solution within a time step, but may converge to the wrong wetting front at a given elapsed time unless a sufficiently refined mesh is used. UR2 converges much more slowly within a time step, but the error in the wetting front is smaller than that generated by UR1.     

Delay-dependent state estimation for delayed neural networks

In this letter, the delay-dependent state estimation problem for neural networks with time-varying delay is investigated. A delay-dependent criterion is established to estimate the neuron states through available output measurements such that the dynamics of the estimation error is globally exponentially stable. The proposed method is based on the free-weighting matrix approach and is applicable to the case that the derivative of a time-varying delay takes any value. An algorithm is presented to compute the state estimator. Finally, a numerical example is given to demonstrate the effectiveness of this approach and the improvement over existing ones.     

An accurate and practical buffer allocation model for the buffer cache based on marginal gains

A new dynamic buffer allocation strategy based on the notion of marginal gains is presented for the buffer cache that is used by the operating system to store frequently accessed disk blocks in main memory, and the performance of the proposed strategy is compared with those of previous allocation strategies. In the proposed strategy, marginal gain values are predicted by exploiting functions that approximate the expected number of buffer hits per unit time. Experimental results from both trace-driven simulation and an actual implementation in the FreeBSD operating system show that the proposed strategy accurately predicts the marginal gain values for various workloads resulting in significantly improved buffer hit ratios.     

Robust Space Time Receiver for CDMA-based Antenna Arrays

In this paper, we propose a new robust code division multiple access (CDMA) receiver of which weight vector is obtained by projecting the effective spatio-temporal signature waveform onto the signal subspace of the data covariance matrix. We verified our proposed algorithm by the field measured data obtained with a custom-built wideband CDMA test-bed. It will be shown that the proposed algorithm is robust to the signal mismatch.     

采用活性非均匀分布催化剂中变反应器的模拟计算

模拟计算表明:采用活性趋于表层的分布,可以较明显地提高国产中温变换催化剂的内表面利用率,有效地节省催化剂用量,而对“热点”温度没有多大影响。     

宝山水电站坝区配电的选型及应用

本文通过ZWB组合式变电站在黑龙江省宝山水电站工程中的应用,论述了在坝区配电中选用组合式变电站的作用和必要性,并简要介绍了宝山电站组合式变电站的选型要点。     

基于DFT插值的宽带波束形成器设计

本文提出一种基于DFT插值的宽带波束形成器设计方法。首先推导了具有频率不变波束图的连续线阵的灵敏度函数与离散线列阵加权系数之间的关系；接着给出了基于DFT插值的宽带波束形成器设计的两个步骤：（1）使用窄带波束形成器的设计方法计算在参考频率下基阵的加权系数；（2）根据参考频率下基阵的权系数与其它子带权系数之间的关系，利用DFT插值的方法求出其它子带的加权系数。最后，给出了一个设计实例说明本文方法的有效性。