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排序方式: 共有746条查询结果,搜索用时 18 毫秒
1.
气相二氧化硅生产现状及其在涂料中的应用 总被引:5,自引:0,他引:5
介绍了气相二氧化硅国内外生产状况,根据气相二氧化硅在涂料方面的应用特点及主 要技术关键的分析,提出了建议。 相似文献
2.
Shiue-Lung Chen Shui-Jinn Wang Kai-Ming Uang Tron-Min Chen Wei-Chi Lee Bor-Wen Liou 《Photonics Technology Letters, IEEE》2007,19(6):351-353
Through the use of selective nickel (Ni) electroplating, patterned laser liftoff technique, and surface roughing of the top n-GaN epilayer, a novel process for the fabrication of vertical-structured metal-substrate GaN-based light-emitting diodes (VM-LEDs) to avoid difficulties in Ni substrate dicing and improve device yield was proposed and demonstrated. In conjunction with a sidewall passivation with SiO2 and keeping the size of epilayer smaller than that of Ni island, a considerable improvement in yield and device performance were shown. As compared to conventional lateral-structured GaN-based LEDs, VM-LEDs show an increase in light output power about 174% at 350 mA with a significant decrease in forward voltage from 3.5 to 3.17 V 相似文献
3.
Ohtsu M. Liou K.-Y. Burrows E.C. Burrus C.A. Eisenstein G. 《Electronics letters》1987,23(21):1111-1113
A problem in frequency-tuning of external-cavity lasers is mode-hopping between neighbouring external-cavity modes. We demonstrate a new interferometric method for monitoring mode-hoping and an automatic control circuit for a 1.3 ?m grating external-cavity laser that maintains single-mode operation when the lasing frequency is tuned. 相似文献
4.
In this paper, we present efficient VLSI architectures for full-search block-matching motion estimation (BMME) algorithm. Given a search range, we partition it into sub-search arrays called tiles. By fully exploiting data dependency within a tile, efficient VLSI architectures can be obtained. Using the proposed VLSI architectures, all the block-matchings in a tile can be processed in parallel. All the tiles within a search range can be processed serially or concurrently depending on various requirements. With the consideration of processing speed, hardware cost, and I/O bandwidth, the optimal tile size for a specific video application is analyzed. By partitioning a search range into tiles with appropriate size, flexible VLSI designs with different throughput can be obtained. In this way, cost effective VLSI designs for a wide range of video applications, from H.261 to HDTV, can be achieved. 相似文献
5.
Liou S.-P. Chiu A.H. Jain R.C. 《IEEE transactions on pattern analysis and machine intelligence》1991,13(4):317-325
Due to the potential for essentially unbounded scene complexity, it is often necessary to translate the sensor-derived signals into richer symbolic representations. A key initial stage in this abstraction process is signal-level perceptual organization (SLPO) involving the processes of partitioning and identification. A parallel SLPO algorithm that follows the global hypothesis testing paradigm, but breaks the iterative structure of conventional region growing through the use of α-partitioning and region filtering is presented. These two techniques segment an image such that the gray-level variation within each region can be described by a regression model. Experimental results demonstrate the effectiveness of this algorithm 相似文献
6.
Chuxiang Li Jianhua Lu Jun Gu Ming L. Liou 《The Journal of VLSI Signal Processing》2003,33(3):277-285
In this paper, error-resilient schemes are proposed to support robust video transmission for digital terrestrial TV broadcasting (DTTB). In particular, a temporal error concealment incorporated with a low-complexity block-matching is developed, achieving an effective reception of predictive pictures in harsh terrestrial environment. Special algorithms are also designed for isolated I-pictures. Moreover, combined with an intra/inter case prediction, an adaptive error concealment scheme is further contrived to fit for different error conditions. Extensive simulations have been conducted under various DTTB channel conditions, even with a very high packet error rate, to verify the effectiveness of the proposed schemes. 相似文献
7.
The present study was undertaken to evaluate the postoperative relapse from the period of unwiring to 1 year postoperatively and its correlation to the amount of mandibular setback and change in vertical dimension after mandibular bilateral sagittal split osteotomy. Twenty-seven patients were evaluated cephalometrically by the time preoperatively, 6 weeks, 6 months and 1 year postoperatively. It was found that 1) the average amount of mandibular setback at pogonion point, 6 weeks postoperatively, is 7.6mm backward and 1.9mm downward, 2) the average amount of horizontal relapse at pogonion point, 6 months and 1 year postoperatively, are 1.9mm and 2.3mm respectively. 86% of the horizontal relapse, 1 year postoperatively, occurs in the first 6 months after removal of intermaxillary fixation, 3) the average amount of vertical relapse at pogonion point, 6 months and 1 year postoperatively, are 0.9mm and 1.1mm upward. 82% of the vertical relapse, 1 year postoperatively, occurs in the first 6 months after removal of intermaxillary fixation, 4) the amount of 1 year postoperatively horizontal relapse is significantly correlated both with the amount of horizontal mandibular set back and vertical downward change (r = 0.58, 0.67, p < 0.001), whereas the amount of vertical relapse is with the vertical downward change only, but horizontal setback isn't. 相似文献
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