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Bonfini G. Brogna A.S. Garbossa C. Colombini L. Bacci M. Chicca S. Bigongiari F. Guerrini N.C. Ferri G. 《IEEE transactions on circuits and systems. I, Regular papers》2004,51(1):174-177
This paper describes an ultralow-power switched opamp-based integrated analog-to-digital converter (ADC) for cardiac pacemakers applications. The ADC consumption, measured on 10 chip samples and averaged, is 8.18 /spl mu/W (stand-by value: 1 nW) for the analog part and of 9.71 /spl mu/W (5 nW) for the digital one, using a supply battery of 2.8 V. The converter has a resolution of 10-b, its typical operating clock frequency is 32 KHz (2.9 KS/s sampling rate) and is able to reach the same resolution at 2 V (0.7 KS/s sampling rate), with a dissipation of 1 /spl mu/W and 1.3 /spl mu/W for analog and digital part, respectively. 相似文献
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