MOS multiplier/divider cell for analogue VLSI

A novel all-MOS continuous-time multiplier/divider parameterised cell is introduced. It comprises eight MOS transistors and a single operational amplifier. The new cell is highly reconfigurable, versatile, extremely simple to design and its output its conveniently programmed via DC control voltages. Some of the many applications of the new cell in analogue VLSI signal processing include analogue multiplication, signal squaring, division, signal inversion, amplitude modulation and RMS/DC conversion. Moreover, the new cell is easily extendable to achieve analogue vector multiplication, and hence it lends itself naturally to analogue MOS VLSI implementation of feedback/feedforward neural networks.<>     

Configurable CMOS multiplier/divider circuits for analog VLSI

The design of five simple CMOS opamp based multipler/divider circuits is presented. Each two opamp and six MOSFET transistor circuit simultaneously achieves four-quadrant multiplication and division. Applications of the new circuits in analog signal processing and neural networks are discussed. The multiplier/divider circuits are all insensitive to MOS intrinsic parasitic capacitances. They do, however, exhibit different sensitivities to opamp finite unity-gain bandwidth. These sensitivities may be mitigated using the configurability property of the circuits. Finally experimental results are provided to support some of the theoretical claims.     

High Linearity BiCMOS Multiplier/Transconductor Structures

A new wide-input range BiCMOS analog multiplier is proposed basedon the triode and saturation region operation of the MOS transistors. Thenew circuit can also be reconfigured to operate as a versatile OperationalTransconductance Amplifier, OTA, with independent current bias control for Nstages. The novel design involves the use of attenuators at the input stageto boost the input linear range. It also utilizes a high output impedancesubtractor setup at the output stage to obtain a single-ended output. Thenew circuit is characterized by its large input range, its high linearityand ability to operate at low voltages as well as high frequencies. HSPICEsimulation results of the circuit, using the MOSIS 2 µm processparameters, resulted in an input range of ±4 V (±5 V supply),±1.9 V (±3 V supply) and ±1 V (±2 V supply),with linearity error less than 0.5%. Its usages in certainanalog signal processing applications are also discussed.