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Many video-based techniques for assessing postures at work have been developed. Choosing the most appropriate technique should be based on an evaluation of different alternatives in terms of their ability to produce posture information at low input costs, i.e. their cost efficiency. This study compared four video-based techniques for assessing upper arm postures, using cost and error data from an investigation on hairdressers. Labour costs associated with the posture assessments from the video recordings were the dominant factor in the cost efficiency comparison. Thus, a work sampling technique associated with relatively large errors appeared, in general, to be the most cost-efficient because it was labour-saving. Measurement bias and other costs than labour cost for posture assessment influenced the ranking and economic evaluation of techniques, as did the applied measurement strategy, i.e. the numbers of video recordings and repeated assessments of them. PRACTITIONER SUMMARY: The cost efficiency of four video-based techniques for assessing upper arm postures was compared. Work sampling techniques were in general more cost efficient than continuous observations since they were labour-saving. Whilst a labour cost dominated the comparison, 'hidden costs', bias and measurement strategy also influenced this dominance.  相似文献   
3.
The current study was carried out with a view to investigating the influence of age-hardening parameters, aging temperature and time, on the tensile properties and quality indices of a high-strength Al-9 pct Si casting alloy, namely, 354-Al-9 pct Si-1.8 pct Cu-0.5 pct Mg. Quality charts were used as an evaluation tool for selecting the optimum conditions to be applied, in practice, in order to develop high strength and optimum quality in 354 casting alloy. Aging at a low temperature of 428 K (155 °C) was observed to produce the greatest strength and optimum quality in the 354-type castings compared to aging at higher temperatures. The peak strength observed for 354 alloy may be attained after shorter aging times on the condition that the aging temperature is increased. The aging times required for reaching peak strength in 354 alloys are 72 hours, 40 hours, 8 hours, 1 hour, and 15 minutes at aging temperatures of 428 K, 443 K, 468 K, 493 K, and 518 K (155 °C, 170 °C, 195 °C, 220 °C, and 245 °C), respectively. Aging treatment at higher temperatures is accompanied by a reduction in the tensile properties and quality index values of the castings; however, it also introduces the possibility of a significant economical strategy for minimizing the time and the cost of this same treatment. Aging treatment at a lower temperature of 428 K (155 °C) produces fine and dense precipitates displaying smaller interparticle spacing, while at higher aging temperatures, such as 518 K (245 °C), the precipitates are coarser in size, less dense, and more widely dispersed. The quality charts developed in the course of the current research facilitate the interpretation and evaluation of the tensile properties of the 354 alloy. Such charts provide a logical evaluation tool, from the metallurgical point of view, for an accurate prediction of the influence of aging parameters studied on the properties of the alloys. Depending on the required level of tensile properties and based on the quality charts developed, it is possible to make a rigorous selection as to the most suitable aging parameters to be applied to the 354 alloy so as to obtain the best possible cost-effective compromise between alloy strength and quality.  相似文献   
4.
This paper presents a new CMOS fully differential second-generation current conveyor (FDCCII). The proposed FDCCII is based on a fully differential difference transconductor as an input stage and two class AB output stages. Besides the proposed FDCCII circuit is operating at supply voltages of ±1.5 V, it has a total standby current of 380 μA. The application of the FDCCII to realize variable gain amplifier, fully differential integrator, and fully differential second order bandpass filter are given. The proposed FDCII and its applications are simulated using CMOS 0.35 μm technology.  相似文献   
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Novel grounded and floating CMOS active nonlinear resistors with odd symmetrical characteristics are designed. The nonlinear resistors are then incorporated into two chaotic oscillator circuits based on a CMOS current feedback op amp (CFOA). The slopes of both the negative and positive segments of the nonlinear characteristics are voltage controlled, allowing for a wide range of dynamic behaviour to be observed and easily tuned in a period doubling route to chaos. Nonlinear current–voltage characteristics are derived in a piecewise-linear form and shown possibly to be modelled using a cubic polynomial approximation. PSPICE simulations using a standard 2.0 μm technology file and numerical simulations of the derived chaotic mathematical models are included.  相似文献   
7.
A scenario-based reliability analysis approach for component-based software   总被引:1,自引:0,他引:1  
This paper introduces a reliability model, and a reliability analysis technique for component-based software. The technique is named Scenario-Based Reliability Analysis (SBRA). Using scenarios of component interactions, we construct a probabilistic model named Component-Dependency Graph (CDG). Based on CDG, a reliability analysis algorithm is developed to analyze the reliability of the system as a function of reliabilities of its architectural constituents. An extension of the proposed model and algorithm is also developed for distributed software systems. The proposed approach has the following benefits: 1) It is used to analyze the impact of variations and uncertainties in the reliability of individual components, subsystems, and links between components on the overall reliability estimate of the software system. This is particularly useful when the system is built partially or fully from existing off-the-shelf components; 2) It is suitable for analyzing the reliability of distributed software systems because it incorporates link and delivery channel reliabilities; 3) The technique is used to identify critical components, interfaces, and subsystems; and to investigate the sensitivity of the application reliability to these elements; 4) The approach is applicable early in the development lifecycle, at the architecture level. Early detection of critical architecture elements, those that affect the overall reliability of the system the most, is useful in delegating resources in later development phases.  相似文献   
8.
Design and simulation of a digitally controlled CMOS fully differential current conveyor (DCFDCC) is presented. A novel current division network (CDN) is used to provide the digital control of the current gain between terminals X and Z of this DCFDCC. The proposed DCFDCC operates under low supply voltage of /spl plusmn/1.5 V. The realization of the DCFDCC using the new CDN is presented by two approaches. First approach has linearly proportional current gain with the digitally controlled parameter of the CDN, while the second approach exhibits current gain between terminals X and Z greater than, or equal to, one. Applications of the DCFDCC in realizing second order universal active filter and variable gain amplifier are given. PSPICE simulation confirms the performance of the proposed blocks and its applications.  相似文献   
9.
The method of electromagnetic interference fringes for the prospecting of conductive subsurfaces inside the earth is reviewed. The fields radiated by an electrically small horizontal loop situated on the earth's surface are derived and expressed in terms of different interfering wave components. The variable distance interference fringes (VDIF) method and the variable frequency interference (VFIF) method of prospecting are considered, and an interpretation procedure using the data obtained from both methods is suggested.  相似文献   
10.

The initial solution of a massive multiple-input multiple-output (M-MIMO) detector for uplink (UL) is greatly influence the balance between the bit error rate (BER) performance and the computational complexity. Although the maximum likelihood (ML) detector obtains the best BER performance, it has an extremely high computational complexity. Iterative linear minimum mean square error (MMSE) detector based on the Gauss–Seidel (GS), the successive over-relaxation (SOR), and the Jacobi (JA), obtains a good performance-complexity profile when the base station (BS)-to-user-antenna-ratio (BUAR) is large. However, when the BUAR is small, the system suffers from a considerable performance loss. In this paper, a hybrid detector based on the joint GS and SOR methods is proposed where the initial solution is determined by the first iteration of GS method. Numerical results show a considerable complexity reduction and performance enhancement using the proposed GS-SOR method over all methods when the BUAR is small.

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