Direct extraction of MOSFET dynamic thermal characteristics from standard transistor structures using small signal measurements

A method is presented for directly obtaining the temperature rise in MOSFETs due to channel current self-heating. The technique is based on small signal measurements, and also provides thermal time-constant data. No special layout structures are needed, making it suitable for bulk and SOI technologies. Experimental results are compared with data obtained using thermal noise measurements with a special SOI MOSFET, and the two figures show good agreement.<>     

Self-heating effects in SOI MOSFETs and their measurement by smallsignal conductance techniques

Self-heating is an important issue for SOI CMOS, and hence, so is its characterization and modeling. This paper sets out how the critical parameters for modeling, i.e., thermal resistance and thermal time-constants, may be obtained using purely electrical measurements on standard MOS devices. A summary of the circuit level issues is presented, and the physical effects contributing to thermally related MOSFET behavior are discussed. A new thermal extraction technique is presented, based on an analytically derived expression for the electro-thermal drain conductance in saturation. Uniquely, standard MOSFET structures can be used, eliminating errors due to additional heat flow through special layouts. The conductance technique is tested experimentally and results are shown to be in excellent agreement with thermal resistance values obtained from noise thermometry and gate resistance measurements using identical devices. It is demonstrated that the conductance technique can be used confidently over a wide range of bias conditions, with both fully and partially depleted devices     

A physically based compact model of partially depleted SOI MOSFETsfor analog circuit simulation

In this paper, the Southampton Thermal AnaloGue (STAG) compact model for partially depleted (PD) silicon-on-insulator (SOI) MOSFETs is presented. The model uses a single expression to model the channel current, thereby ensuring continuous transition between all operating regions. Furthermore, care has been taken to ensure that this expression is also infinitely differentiable, resulting in smooth and continuous conductances and capacitances as well as higher order derivatives. Floating-body effects, which are particular to PD SOI and which are of concern to analog circuit designers in this technology, are well modeled. Small geometry effects such as channel length modulation (CLM), drain-induced barrier lowering (DIBL), charge sharing, and high field mobility effects have also been included. Self-heating (SH) effects are much more apparent in SOI devices than in equivalent bulk devices. These have been modeled in a consistent manner, and the implementation in SPICE3f5 gives the user an additional thermal node which allows internal device temperature rises to be monitored and also accommodates the modeling of coupled heating between separate devices. The model has been successfully used to simulate a variety of circuits which commonly cause problems with convergence. Due to its inherent robustness, the model can normally achieve convergence without recourse to the setting of initial nodal voltage estimates     

A high bandwidth constant gm and slew-rate rail-to-railCMOS input circuit and its application to analog cells for low voltageVLSI systems

A new rail-to-rail CMOS input architecture is presented that delivers behavior nearly independent of the common-mode level in terms of both transconductance and slewing characteristics. Feedforward is used to achieve high common-mode bandwidth, and operation does not rely on analytic square law characteristics, making the technique applicable to deep submicron technologies. From the basis of a transconductor design, an asynchronous comparator and a video bandwidth op amp are also developed, providing a family of general purpose analog circuit functions which may be used in high (and low) bandwidth mixed-signal systems. Benefits for the system designer are that the need for rigorous control of common-mode levels is avoided and input signal swings right across the power supply range can be easily handled. A further benefit is that having very consistent performance, the circuits can be easily described in VHDL (or other behavioral language) to allow simulation of large mixed-signal systems. The circuits presented may be easily adapted for a range of requirements. Results are presented for representative transconductor, op amp, and comparator designs fabricated in a 0.5 μm 3.3 V digital CMOS process     

Micromachined Vibratory Gyroscopes Controlled by a High-Order Bandpass Sigma-Delta Modulator

This work reports on the design of novel closed-loop control systems for the sense mode of a vibratory-rate gyroscope based on a high-order sigma-delta modulator (SigmaDeltaM). A low-pass and two distinctive bandpass topologies are derived, and their advantages discussed. So far, most closed-loop force-feedback control systems for these sensors were based on low-pass SigmaDeltaM's. Usually, the sensing element of a vibratory gyroscope is designed with a high quality factor Q to increase the sensitivity and, hence, can be treated as a mechanical resonator. Furthermore, the output characteristic of vibratory rate gyroscopes is narrowband amplitude-modulated signal. Therefore, a bandpass SigmaDeltaM is a more appropriate control strategy for a vibratory gyroscope than a low-pass SigmaDeltaM. Using a high-order bandpass SigmaDeltaM, the control system can adopt a much lower sampling frequency compared with a low-pass SigmaDeltaM while achieving a similar noise floor for a given oversampling ratio (OSR). In addition, a control system based on a high-order bandpass SigmaDeltaM is superior as it not only greatly shapes the quantization noise, but also alleviates tonal behavior, as is often seen in low-order SigmaDeltaM control systems, and has good immunities to fabrication tolerances and parameter mismatch. These properties are investigated in this study at system level     

A low-power high-performance SiGe BiCMOS 802.11a/b/g transceiver IC for cellular and bluetooth Co-existence applications

This paper describes a high-performance WLAN 802.11a/b/g radio transceiver, optimized for low-power in mobile applications, and for co-existence with cellular and Bluetooth systems in the same terminal. The direct-conversion transceiver architecture is optimized in each mode for low-power operation without compromising the challenging RF performance targets. A key transceiver requirement is a sensitivity of -77 dBm (at the LNA input) in 54 Mb/s OFDM mode while in the presence of a GSM1900 transmitter interferer. The receiver chain achieves an overall noise figure of 2.8/3.2 dB, consuming 168/185 mW at 2.8 V for the 2.4/5GHz bands, respectively. Signal loopback and transmit power detection techniques are used in conjunction with the baseband modem processor to calibrate the transmitter LO leakage and the transceiver I/Q imbalances. Fabricated in a 70 GHz f/sub T/ 0.25-/spl mu/m SiGe BiCMOS technology for system-in-package (SiP) use, the dual-band, tri-mode transceiver occupies only 4.6 mm/sup 2/.     

A full Nyquist 15 MS/s 8-b differential switched-current A/Dconverter

This paper describes the architecture and circuit design of an experimental 8-b differential 15 MS/s CMOS A/D converter, implemented using the switched-current (SI) technique. Particular emphasis has been given to maintaining analog bandwidth and hence the effective number of bits right across the input Nyquist band. Individual cells have also been optimized for inherent accuracy to achieve good performance in a simple uncorrected conversion algorithm. The converter is fabricated in a standard 0.8 μm 5 V digital CMOS process and occupies 2.4 mm²      

A CDMA2000 zero-IF receiver with low-leakage integrated front-end

This paper describes a highly integrated CDMA 2000 US-CEL band (880-MHz) receiver. The single-chip zero-IF design incorporates all receiver signal-path functions including the low-noise amplifier (LNA) on a single die. The complete receiver design exceeds the stringent linearity and local oscillator (LO) leakage requirements for this standard arising from the coexistence with narrow-band FM signals. The integrated LNA achieves 1.0-dB noise figure with +9-dBm IIP3 at high gain, and by maintaining LO leakage to the antenna port well below -80 dBm at all gain settings, no external LNA is required. The receiver is fabricated in a 0.25-/spl mu/m 40-GHz f/sub t/ BICMOS technology, and occupies 3 mm/sup 2/.     

Impact of self-heating and thermal coupling on analog circuits inSOI CMOS

This paper examines the influence of the static and dynamic electrothermal behavior of silicon-on-insulator (SOI) CMOS transistors on a range of primitive analog circuit cells. In addition to the more well-known self-heating close-range thermal coupling effects are also examined. Particular emphasis is given to the impact of these effects on drain current mismatch due to localized temperature differences. Dynamic electrothermal behavior in the time and frequency domains is also considered, measurements and analyses are presented for a simple amplifier stage, current mirrors, a current output D/A converter, and ring oscillators fabricated in a 0.7-μm SOI CMOS process. It is shown that circuits which rely strongly on matching, such as the current mirrors or D/A converter, are significantly affected by self-heating and thermal coupling. Anomalies due to self-heating are also clearly visible in the small-signal characteristics of the amplifier stage. Self-heating effects are less significant for fast switching circuits. The paper demonstrates how circuit-level simulations can be used to predict undesirable nonisothermal operating conditions during the design stage     

Integrated continuous-time balanced filters for 16-b DSP interfaces

A fully integrated, low-distortion, balanced, continuous-time filter fabricated in 5-V, 1.6-μm CMOS is presented. Active RC structures are used in a leapfrog topology, with time constants set by integrated passive resistors and capacitors. Accurate tuning is achieved by selection of capacitor elements under the control of a new calibrator circuit. With a 2-V_rms differential input and output, the filter achieves -94-dB THD (total harmonic distortion) and 95-dB signal-to-noise ratio. Tuning accuracy is maintained to within ±5% of nominal over the commercial temperature range