Characteristics of Schottky Barrier Junction Based on Hexagonal Microtube ZnO

Hexagonal microtube ZnO was firstly grown on single crystal p-Si (111) substrates by hydrothermal method, and fabricated Ag/n-ZnO and Au/n-ZnO Schottky junction. Schottky effective barrier heights were calculated by I-V measurement. It is confirmed that the presence of a large amount of surface states related possibly to lattice imperfections existed near the surface leads to the pinning of the surface Fermi level at 0.35 eV below the conduction-band edge. Then the fabricated Schottky barrier junctions are evaluated for their use as UV photodetectors.     

B2O3掺杂对直流ZnO压敏电阻老化特性的影响

ZnO压敏电阻是避雷器的核心部件,其性能的好坏直接影响着避雷器的电气性能。因此,该文致力于通过B₂O₃的掺杂以改善直流ZnO压敏电阻的非线性和高荷电率下的老化稳定性,并利用扫描电子显微镜（SEM）、X射线衍射（XRD）和电容-电压（C-V）等特性测试研究B₂O₃掺杂对直流ZnO压敏电阻的微观结构和电气特性的影响。然后,在115℃、0.95E_1mA的条件下对直流ZnO压敏电阻进行1000h的直流加速老化试验,以验证其在高荷电率下的老化稳定性。试验结果表明,B₂O₃的掺杂提高了晶界层的势垒高度,改善了直流ZnO压敏电阻的非线性特性,并降低了其在高荷电率下的老化系数。     

NiuPt1-uSivGe1-v/Si0.72Ge0.28界面形貌的改善

针对锗硅在形成金属锗硅化物时存在部分应力释放、界面形貌特性变差的问题,提出了在Si0.72Ge0.28上分别外延薄硅(Si)覆盖层和锗硅(Si072Ge0.28)缓冲层的工艺方案.实验结果表明,通过两步快速热退火,两个方案的工艺条件都能形成低阻的NiuPt1-uSitGe1-v和改善NivPt1-uSitGe./Si0.72Ge0.28的界面形貌.但相比较而言,在Si0.72Ge0.28上外延10 nm Si覆盖层的方案能够形成更好的NiuPt1-uSivGe1-t/Si0.72Ge0.28界面形貌.与没有改进的方案相比,该方案形成的肖特基接触更具有更低的肖特基接触势垒高度,更易形成欧姆接触.     

SBD势垒高度的影响因素

针对硅材料的肖特基势垒二极管(Schottky Barrier Diode,简称SBD)的击穿电压普遍很低,严重影响其实际应用的问题,采用实验与理论分析相结合的方式,着重于表面态、界面层对势垒高度的影响进行研究.提取了三个重要参数:表面态密度D_i、界面层电容密度C_i和表面态中性能级Φ_0.结果表明,势垒高度的高低强烈依赖于这三个特性参数的大小.     

Bi2O3对TiO2系压敏陶瓷性能的影响

采用传统电子陶瓷工艺制作了TiO2系压敏陶瓷。通过测试其I-V特性、复阻抗特性、晶界电阻、晶粒电阻及势垒高度,研究了Bi2O3对TiO2-Bi2O3-Nb2O5-SrO系压敏陶瓷微结构及电性能的影响。结果表明,Bi2O3的适当掺杂范围在0.3%~0.5%(摩尔分数)。其掺杂量的变化,可显著改变TiO2-Bi2O3-Nb2O5-SrO系压敏陶瓷的晶界电阻及势垒高度,进而对压敏陶瓷的电学非线性特性产生影响。当x(Bi2O3)为0.4%时,压敏陶瓷的V1mA与α分别为40V/mm与6.2。     

Impedance Analysis of Grain Barrier Potential in SnO2 Gas Sensors^①②

The potential barrier(or“grain boundaries”)of SnO2 gas sensor is the dominant factor of conductivity.A new simple method is applied to study the grain boundary using impedance analyzer under different DC bias.A model is presented to explain the experiment results.The model predicts height of the grain boundary under different humidity conditions,as well as grain size.The role of water is discussed.This model can be applied with ease to study the role of other reducing gasses.     

Ni/Ti/Si形成硅化物的特性分析

随着MOSFET的特征尺寸进入20nm技术节点,源漏接触电阻成为源漏寄生电阻的主导部分,后栅工艺对硅化物的高温特性提出了更高的要求。分析了Ni/Ti/Si结构在不同温度退火下形成的硅化物的薄膜特性和方块电阻。分别采用J-V和C-V方法,提取硅化物与n-Si(100)接触的势垒高度。Ni/Ti/Si结构形成的镍硅化物在高温下具有良好的薄膜特性,并且可以得到低势垒的肖特基接触。随着退火温度的升高,势垒高度逐渐降低。研究了界面态的影响,在低于650℃的温度下退火,界面态密度随退火温度升高而逐渐增大,高于750℃后,界面电荷极性翻转。     

电子在一维方势垒顶部的透射

文中对入射电子能量等于一维方势垒高度时，电子对势垒的透射情况进行了理论分析，导出了这一条件下的电子透射系数与势垒高度及势垒宽度之间的关系，并证明了电子对一维方势垒的透射系数Ｔ是入射电子能量Ｅ的连续函数。     

Correlation between Interfacial Oxides and Electrical Characteristics of GaN Schottky Diodes

The electrical characteristics of GaN schottky diode with and without the interracial oxides are compared in this paper. The influence of interracial oxides on the electrical characteristics of the schottky diodes has been confirmed by the I-V, C-V measures. We find the barrier height have a reduction of 0.05 eV- 0.1 eV. There is an interracial insulating oxide with the thickness of 0. 05 nm- 0. 1 nm after conventional cleaning. Either the forward or the backward currents increase. The backward punch through voltages are reduced to 50% and the capacitances have increased by 100%.     

采用场板和B+离子注入边缘终端技术的Ti/4H-SiC肖特基势垒二极管

采用自主外延的4H-SiC外延片,利用PECVD生长的SiO2做场板介质,B 离子注入边缘终端技术,制造了Ti/4H-SiC肖特基势垒二极管.测试结果表明,Ti/4H-SiC肖特基势垒二极管的理想因子n=1.08,势垒高度(ψe)=1.05eV,串联电阻为6.77mΩ·cm2,正向电压为4V时,电流密度达到430A/cm2.反向击穿电压大于1.1kV,室温下,反向电压为1.1kV时,反向漏电流为5.96×10-3 A/cm2.