Ag/Bi4Ti3O12栅铁电场效应管ID-VG特性双曲模型

在理论分析的基础上,结合铁电材料特性及实验数据,提出了Ag/Bi4Ti3O12栅n沟道铁电场效应晶体管转换(ID-VG)特性的双曲模型并进行了数值模拟。该模型不但与阈值电压、沟道饱和电流等器件参数相关而且充分反映了剩余极化、矫顽电压等铁电栅介质极化特性对器件ID-VG特性的影响。结果表明:模拟曲线与实验曲线基本一致,能较好地模拟和描述铁电场效应晶体管的ID-VG特性。     

铁电存储器的研究进展

介绍了铁电存储器的存储原理,同时对两种铁电存储器(铁电随机存取存储器和铁电场效应晶体管存储器)的研究进展、当前存在的问题以及我国目前在这一领域的研究现状进行了简单介绍,并对今后的技术发展进行了展望。     

Empirical Data of the Metal-Ferroelectric-Semiconductor Field Effect Transistor Polarization and Channel Resistance for Timing and Retention Analysis

In this paper, empirical data describing the channel resistance and polarization of several metal-ferroelectric-semiconductor field-effect transistors (MFSFETs) is presented. Various channel length and width transistors were used to describe the channel resistance under various biasing conditions and in both positive and negative polarization states. The presented results and analysis provide insight into the switching speed between polarization states as well as the timing and retention constraints for a given set of device dimensions. This is of particular value when considering circuit designs that utilize MFSFETs, especially digital memory circuits.     

Mathematical Models of the Common-Source and Common-Gate Amplifiers Using a Metal-Ferroelectric-Semiconductor Field Effect Transistor

Mathematical models of the common-source and common-gate amplifiers using metal-ferroelectric-semiconductor field effect transistors (MFSFETs) are developed in this paper. The models are compared against data collected with MFSFETs of varying channel lengths and widths, and circuit parameters such as biasing conditions are varied as well. Considerations are made for the capacitance formed by the ferroelectric layer present between the gate and substrate of the transistors. Comparisons between the modeled and measured data are presented in depth.     

Extended Characterization of the Common-Source and Common-Gate Amplifiers Using a Metal-Ferroelectric-Semiconductor Field Effect Transistor

Collected data for both common-source and common-gate amplifiers is presented in this paper. Characterizations of the two amplifier circuits using metal-ferroelectric-semiconductor field effect transistors (MFSFETs) are developed with wider input frequency ranges and additional device sizes compared to earlier characterizations. The effects of the ferroelectric layer's capacitance and variation of load, quiescent point, or input signal on each circuit are shown. Advantages and applications of the MFSFET and the circuit performance are discussed.     

METAL-FERROELECTRIC-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR NAND GATE SWITCHING TIME ANALYSIS

ABSTRACT

Previous research investigated the modeling of a NAND gate constructed of n-channel Metal-Ferroelectric-Semiconductor Field-Effect Transistors (MFSFETs) to obtain voltage transfer curves. This paper investigates the MFSFET NAND gate switching time propagation delay, which is one of the other important parameters required to characterize the performance of a logic gate. Initially, the switching time of an inverter circuit was analyzed. The low-to-high and high-to-low propagation time delays were calculated. The MFSFETs were simulated by using a previously developed model which utilized a partitioned ferroelectric layer. Then the switching time of a 2-input NAND gate was analyzed similarly to the inverter gate.     

铁电存储器及研究进展

铁电薄膜与半导体集成技术相结合而发展起来的铁电存储器,以其高密度、高速度、非挥发性以及抗辐射性而大大优于目前任何一种半导体存储器.本文介绍了铁电存储器的存储原理、特点、基本结构、研究进展、应用及存在的问题等.     

高P_r/低P_r栅FFET漏极电流与铁电材料特性的关系

分析了对铁电场效应晶体管漏极电流特性有影响的铁电材料参数,设计了具有单层和双层栅介质结构的铁电场效应晶体管,并进行了仿真研究。仿真结果表明:具有高Pr/低Pr栅介质结构的铁电场效应晶体管在饱和极化后,其极化前后输出漏极电流差最大,有利于存储信号的分辨,提高电路的效率。通过改变该结构中低Pr层的Pr,Ec等铁电材料参数,发现在3~4V间饱和极化,该结构的铁电场效应晶体管的漏极电流输出特性比较稳定,减小了对材料、工艺、Ps/Pr及Ec的依赖性和敏感性,具有易于制造和便于电路设计的优点。     

铁电存储器研究进展

铁电薄膜与半导体集成技术相结合而发展起来的铁电存储器,以其高密度、高速度、非易失性以及抗辐射性而大大优于目前任何一种半导体存储器。介绍了铁电存储器的存储原理、特点、基本存储单元、研究进展、应用及存在的问题等。     

铁电存储器的基本单元及其工作模式

按照铁电储存器的破坏性读出和非破坏性读出的这两种基本工作模式及其所对应的铁电随机存取存储器FRAM和铁电场效应晶体管肿FFBT两种结构形式的分类，分别介绍了1T／1C，2T／2C结构和铁电场效应晶体管金属-铁电-半导体（MFS）结构的基本铁电存储单元的结构及其工作模式。