SPFD程序建立有源网络方程的功能

应用电路原理，论述含有多个理想运算放大器网络的机辅分析方法。完善自行编制的ＳＰＦＤ电路分析程序。重点介绍程序中建立电路方程的功能；提供实用的算法及信号流程图。     

An active inductor employing a new four terminal floating nullor transconductance amplifier (FTFNTA)

ABSTRACT

In this scientific study, a new analog active building block named as four terminal floating nullor transconductance amplifier (FTFNTA) is implemented. The FTFNTA design offers a combined essence of both traditional four terminal floating nullor (FTFN) and an operational transconductance amplifier (OTA). The FTFNTA design is extended for the design of a lossless floating and grounded inductor simulator with few passive components. In addition, the performance and usefulness of the proposed inductor topology are also expanded for active filter applications: higher-order Butterworth high-pass filter and current mode multifunction filter. The functionality of the CMOS-based FTFNTA is integrated with a 0.18 µm Taiwan Semiconductor Manufacturing Company (TSMC) CMOS technology. Moreover, the FTFNTA is also realised using the current feedback operational amplifier (CFOA/AD844) and OTA (OTA/CA3080) of a commercially available IC to test the viability of the proposed inductor design. Finally, an application based on the inductor topology and its impedance characteristics are well analysed via PSPICE simulation.     

一种新的网络状态方程列写方法

利用零泛器将有源网络特效为ＲＣ－Ｎｕｌｌｏｒ网络,根据ＲＣ－Ｎｕｌｌｏｒ网络的特殊性,给出了用节点电压洌写状态变量方程的新方法。     

The voltage mirror–current mirror pair as a universal element

The voltage mirror–current mirror (VM–CM) pair is shown to be a universal active element. It provides two alternative realizations for the nullor. The VM–CM pair is also capable of realizing the op amp and all the four types of the current conveyors namely CCII?, CCII+, ICCII? and ICCII+ as special cases. Copyright © 2009 John Wiley & Sons, Ltd.     

零器模型在晶体管放大器分析中的应用

晶体管放大器常采用图解法和等效电路法进行分析．本文以ｎ－ｐ－ｎ型晶体管为例，介绍了零器模型（包括静态模型和动态模型）在晶体管放大器分析方面的应用，它与传统方法不同，简便易行。     

Symbolic analysis of (MO)(I)CCI(II)(III)‐based analog circuits

New nullor‐based models are introduced to describe the behavior of the first generation current conveyor (CCI), second generation current conveyor (CCII), third generation current conveyor (CCIII), their inverting equivalents (ICCI(II)(III)), and/or their multiple output topologies (MO(I)CCI(II)(III)). These nullor equivalents include only grounded resistors to improve the formulation of equations in symbolic nodal analysis. In this manner, it is highlighted the usefulness of the proposed models to calculate analytical expressions in MO(I)CCI(II)(III)‐based analog circuits. Copyright © 2009 John Wiley & Sons, Ltd.     

用于EIT成象系统基于CCⅡ-低通滤波电路设计

文中阐述用于EIT成像系统的低通滤波电路,该电路采用基于CCⅡ原理的集成芯片AD844,其设计方法为零泛器中间等效转化法。     

Efficient generation of compact symbolic network functions in a nested rational form

This paper presents the extension of generalized parameter extraction method for direct circuit function generation in a fully symbolic form of rational expressions or a nested s-expanded polynomial. The new formula for implicit extraction of parameters that allows effective factoring by grouping of determinants of circuits containing any linear models of active elements, such as controlled sources, nullors, and pathological mirrors, is proposed. The concept of nullor with parameter is used for implicit extraction. The rules of optimal selection of parameters for extraction are presented. The proposed algorithm of symbolic analysis is implemented in the CirSym program, which is available online. The paper discusses the results of automatic analysis of several large active circuits, as well as determinants of matrixes and passive topologies, in terms of compact size and minimization of the number of arithmetic operations. Experimental results demonstrate that the expressions of determinants derived by CirSym are more compact than the results of the factorization algorithms of commercial computer algebra systems. The comparison with several other symbolic analysis algorithms shows that CirSym is the only available program that provides the exact calculation of the symbolic function of large circuits in the s-expanded form with every coefficient being a compact-nested expression.