LinkingPark: An automatic semantic table interpretation system

In this paper, we present LinkingPark, an automatic semantic annotation system for tabular data to knowledge graph matching. LinkingPark is designed as a modular framework which can handle Cell-Entity Annotation (CEA), Column-Type Annotation (CTA), and Columns-Property Annotation (CPA) altogether. It is built upon our previous SemTab 2020 system, which won the 2nd prize among 28 different teams after four rounds of evaluations. Moreover, the system is unsupervised, stand-alone, and flexible for multilingual support. Its backend offers an efficient RESTful API for programmatic access, as well as an Excel Add-in for ease of use. Users can interact with LinkingPark in near real-time, further demonstrating its efficiency.     

Seismic behavior of geosynthetic-reinforced retaining walls backfilled with cohesive soil

This study investigates the seismic performance of geosynthetic-reinforced modular block retaining walls backfilled with cohesive, fine grained clay-sand soil mixture. Shaking table tests were performed for three ½ scaled (wall height 190 cm) and ¼ scaled model walls to investigate the effects of backfill type, the influence of reinforcement length and reinforcement stiffness effects. The El Centro and Kobe earthquake records of varying amplitudes were used as base acceleration. Displacement of the front wall, accelerations at different locations, strains on the reinforcements, and the visual observations of the facing and the backfill surface were used to evaluate the seismic performance of model walls. The model walls were subjected to rigorous shaking and the walls did not exhibit any stability problems or signs of impending failure. The maximum deformations observed on the models with cohesive backfill was less than half of the deformation of the sand model. The load transfers between the geogrid and cohesive soil was comparable to that of sand and hence the needed reinforcement length was similar as well. As a result; the model walls with cohesive backfills performed within acceptable limits under seismic loading conditions when compared with granular backfilled counterparts.     

Compiler compatible 5.66 Mb/mm2 8T 1R1W register file in 14 nm FinFET technology

1-read/1-write (1R1W) register file (RF) is a popular memory configuration in modern feature rich SoCs requiring significant amount of embedded memory. A memory compiler is constructed using the 8T RF bitcell spanning a range of instances from 32 b to 72 Kb. An 8T low-leakage bitcell of 0.106 μm² is used in a 14 nm FinFET technology with a 70 nm contacted gate pitch for high-density (HD) two-port (TP) RF memory compiler which achieves 5.66 Mb/mm² array density for a 72 Kb array which is the highest reported density in 14 nm FinFET technology. The density improvement is achieved by using techniques such as leaf-cell optimization (eliminating transistors), better architectural planning, top level connectivity through leaf-cell abutment and minimizing the number of unique leaf-cells. These techniques are fully compatible with memory compiler usage over the required span. Leakage power is minimized by using power-switches without degrading the density mentioned above. Self-induced supply voltage collapse technique is applied for write and a four stack static keeper is used for read Vmin improvement. Fabricated test chips using 14 nm process have demonstrated 2.33 GHz performance at 1.1 V/25 °C operation. Overall V_min of 550 mV is achieved with this design at 25 °C. The inbuilt power-switch improves leakage power by 12x in simulation. Approximately 8% die area of a leading 14 nm SoC in commercialization is occupied by these compiled RF instances.     

Small‐Sized High‐Power PIN Diode Switch with Defected Ground Structure for Wireless Broadband Internet

This letter presents a small‐sized, high‐power single‐pole double‐throw (SPDT) switch with defected ground structure (DGS) for wireless broadband Internet application. To reduce the circuit size by using a slow‐wave characteristic, the DGS is used for the quarter‐wave (°/4) transmission line of the switch. To secure a high degree of isolation, the switch with DGS is composed of shunt‐connected PIN diodes. It shows an insertion loss of 0.8 dB, an isolation of 50 dB or more, and power capability of at least 50 W at 2.3 GHz. The switch shows very similar performance to the conventional shunt‐type switch, but the circuit size is reduced by about 50% simply with the use of DGS patterns.     

PDC钻头水力结构优化设计研究

在PDC钻头工作过程中，钻井液对钻头体表面的冲洗、冷却和润滑是保证钻头正常工作的一个非常重要的条件。对PDC钻头而言，水力结构（主要是中心水眼和冠部水道）设计的重要性尤其突出。以前,对钻头水力系统研究只能通过实验的方法进行,研究周期长、成本高、结构调整不方便，而数值模拟的方法在几年前还不成熟，甚至静态的复杂结构流场问题基本无法解决。为此，在提出PDC钻头水力结构优化设计原则的基础上，对PDC钻头的三维流场进行了数值模拟。模拟中考虑了钻头的喷嘴布置位置、直径、数量以及切削齿对流场的影响。计算结果表明，原设计在喷嘴布置位置和喷射角度上存在不足，以此为基础进行了水力结构的优化设计。文中的研究成果成功地应用在新型钻头水力结构的设计中，研究方法为PDC钻头水力结构优化分析奠定了理论基础。     

SOI光电子集成

SOI（Silicon-on-Insulator)光电子集成已成为十分引人注目的研究课题，其工艺与CMOS工艺完全兼容，可以实现低成本的SOI基整片集成光电子回路。本文综述了近几年来SOI集成光电子器件的发展以及一些最新的研究进展，着重分析几种最新型光无源器件的工作原理和结构，包括SOI光波导、SOI光波导耦合器、SOI光波导开关、相位阵列波导光栅（PAWG）、基于SOI的光探测器等，并介绍了中国科学院半导体所集成光电子国家重点实验室的研究进展。     

宽带DDS跳频源设计

直接数字合成（DDS）简单可靠、控制方便，具有很高的频率分辨率，高速转换，非常适合快速跳频的要求。在对DDS基本原理进行了简要介绍和分析后，提出宽带跳频源设计方案。     

基于粗糙集信息观的决策表属性约简方法

粗糙集理论是近年来发展起来的一种有效的处理不精确、不确定、含糊信息的数学理论方法，它被广泛应用于相容和不相容决策表的属性约简和核属性计算。利用反例指出目前基于粗糙集信息观[2、6]的决策表属性约简和核属性计算方法的局限性。对决策表的性质作了深入的研究，研究发现文献[2、6]方法的不足原因是：它们没有考虑U／ind（C）中等价类的相客性。给出了基于U／ind（C）中等价类相客性的属性约简定义和核属性定义，并给出了一种新的基于粗糙集信息观的决策表属性约简和核属性计算方法。讨论了该方法同文献[2、6]方法的区别。最后用相同实例验证了该方法的有效性。     

一个基于PE分层技术的电子政务网络平台

电子政务网络建设的主要目标就是建立一个开放的、基于标准的统一网络平台，并在该平台上实现政府不同部门之间的信息交换和资源共享，同时保证各部门信息的独立和安全。通过介绍电子政务网络建设中的主流技术——MPLSVPN，提出了一种基于该技术原理的PE分层技术，详细讨论了基于该分层技术的电子政务网络平台的实现过程和主要技术，并对其性能参数进行了测试与分析。     

高分辨率地震资料处理中的优化速度分析方法

速度分析是地震资料处理过程中的重要一环。速度分析的质量直接影响动静校正,继而影响叠加成像以及偏移归位。针对如何优化速度分析,提出了基于道集资料噪音衰减、道集内相位时差校正、道集优化处理以及速度拾取应用约束等过程的优化速度分析方法。该方法在实际资料处理中取得了很好的效果。