Output feedback controller for polytopic systems exploiting the direct searching of the design space

This paper deals with the problem of designing a robust static output feedback controller for polytopic systems. The current research that tackled this problem is mainly based on LMI method, which is conservative by nature. In this paper, a novel approach is proposed, which considers the design space of the controller parameters and iteratively partitions the space to small simplexes. Then, by assessing the stability in each simplex, the solution space for design parameters is directly determined. It has been theoretically proved that, if there exists a feasible solution in the design space, the algorithm can find it. To validate the result of the proposed approach, comparative simulation examples are given to illustrate the performance of the design methodology as compared to those of previous approaches.     

A Global Maximum Error Controller Based Nonlinearity Aware TPWL Method for Reducing Nonlinear Systems

Abstract

Model order reduction is a common practice to reduce large order systems so that their simulation and control become easy. Nonlinearity aware trajectory piecewise linear is a variation of trajectory piecewise linearization technique of order reduction that is used to reduce nonlinear systems. With this scheme, the reduced approximation of the system is generated by weighted sum of the linearized and reduced sub-models obtained at certain linearization points on the system trajectory. This scheme uses dynamically inspired weight assignment that makes the approximation nonlinearity aware. Just as weight assignment, the process of linearization points selection is also important for generating faithful approximations. This article uses a global maximum error controller based linearization points selection scheme according to which a state is chosen as a linearization point if the error between a current reduced model and the full order nonlinear system reaches a maximum value. A combination that not only selects linearization points based on an error controller but also assigns dynamic inspired weights is shown in this article. The proposed scheme generates approximations with higher accuracies. This is demonstrated by applying the proposed method to some benchmark nonlinear circuits including RC ladder network and inverter chain circuit and comparing the results with the conventional schemes.     

PSO优化多核RVM的模拟电路故障预测

针对模拟电路健康管理的特点，提出了一种基于PSO优化多核RVM的模拟电路故障预测方法。利用参数分析得到电路的输出频域响应作为特征，计算其与电路无故障标准响应的欧氏距离来表征电路元件健康值，将多个核函数线性组合，并用PSO优化多核RVM参数后的模型实现对各个时间点元件的健康值变化轨迹进行预测。仿真结果表明，该方法在小样本情况下，预测效果优于单一核函数的RVM模型，适用于健康管理中实时预测，具有较好的实用性。     

一款紧凑增强型可变阻抗电磁带隙结构

基于传统AI-EBG结构,提出了一种小尺寸的增强型电磁带隙结构,实现了从0.5~9.4 GHz的宽频带-40 dB噪声抑制深度,且下截止频率减少到数百MHz,可有效抑制多层PCB板间地弹噪声。文中同时研究了EBG结构在高速电路应用时的信号完整性问题,使用差分信号方案可改善信号完整性。     

A computer aided design method for car form and its application based on shape parameters

In the early design stage, automotive modeling should both meet the requirements of aesthetics and engineering. Therefore, a vehicle CAD (computer aided design) model that can be easily adjusted by feedbacks is necessary. Based on CE-Bézier surface, this paper presents a set of algorithms for parametric segmentation and fairing surface generation in a car model. This model is defined by a simplified automotive template and relevant control points, shape parameters and segmentation parameters, which can be modified to alter the car form efficiently. With this model and the corresponding adjustment method, more than fifty various vehicle models are established in this research according to different parameters. And two methods for calculating similarity index between car models are constructed, which are suitable for brand design trend analysis and modelling design decisionmaking.     

Voltage reference architectures for low-supply-voltage low-power applications

This paper presents a voltage reference generator architecture and two different realizations of it that have been fabricated within a standard 0.18 μm CMOS technology. The architecture takes the advantage of utilizing a sampled-data amplifier (SDA) to optimize the power consumption. The circuits achieve output voltages on the order of 190 mV with temperature coefficients of 43 ppm/°C and 52.5 ppm/°C over the temperature range of 0 to 120°C without any trimming with a 0.8 V single supply. The power consumptions of the circuits are less then 500 nW while occupying an area of 0.2 mm² and 0.08 mm², respectively.     

应用时频分析方法辨识时变系统的模态参数

应用Gabor展开及Hilbert变换进行时变线性系统模态参数的辨识。利用非平稳信号的Gabor变换将结构响应信号表示在时频面上，并通过Gabor展开重构分离模态分量，建立每一阶模态的时变线性模型。对单模态时变线性模型应用Hilbert变换来辨识随时间变化的模态频率和阻尼。通过对刚度和阻尼慢变的两自由度系统模态参数的仿真辨识验证辨识方法的有效性。仿真结果表明：本文方法为时变线性系统的模态参数辨识提供了一条新的途径。