用CPLD实现SRAM工艺FPGA的安全应用

提出了一种利用CPLD产生的伪随机码来加密SRAM工艺FPGA的方法,并详细介绍了具体的电路和VHDL代码。     

Proving termination of GHC programs

A transformational approach for proving termination of parallel logic programs such as GHC programs is proposed. A transformation from GHC programs to term rewriting systems is developed; it exploits the fact that unifications in GHC-resolution correspond to matchings. The termination of a GHC program for a class of queries is implied by the termination of the resulting rewrite system. This approach facilitates the applicability of a wide range of termination techniques developed for rewrite systems in proving termination of GHC programs. The method consists of three steps: (a) deriving moding information from a given GHC program, (b) transforming the GHC program into a term rewriting system using the moding information, and finally (c) proving termination of the resulting rewrite system. Using this method, the termination of many benchmark GHC programs such as quick-sort, merge-sort, merge, split, fair-split and append, etc., can be proved. This is a revised and extended version of Ref. 12). The work was partially supported by the NSF Indo-US grant INT-9416687 Kapur was partially supported by NSF Grant nos. CCR-8906678 and INT-9014074. M. R. K. Krishna Rao, Ph.D.: He currently works as a senior research fellow at Griffith University, Brisbane, Australia. His current interests are in the areas of logic programming, modular aspects and noncopying implementations of term rewriting, learning logic programs from examples and conuterexamples and dynamics of mental states in rational agent architectures. He received his Ph.D in computer science from Tata Institute of Fundamental Research (TIFR), Bombay in 1993 and worked at TIFR and Max Planck Institut für Informatik, Saarbrücken until January 1997. Deepak Kapur, Ph.D.: He currently works as a professor at the State University of New York at Albany. His research interests are in the areas of automated reasoning, term rewriting, constraint solving, algebraic and geometric reasoning and its applications in computer vision, symbolic computation, formal methods, specification and verification. He obtained his Ph.D. in Computer Science from MIT in 1980. He worked at General Electric Corporate Research and Development until 1987. Prof. Kapur is the editor-in-chief of the Journal of Automated Reasoning. He also serves on the editorial boards of Journal of Logic Programming, Journal on Constraints, and Journal of Applicable Algebra in Engineering, Communication and Computer Science. R. K. Shyamasundar, Ph.D.: He currently works as a professor at Tata Institute of Fundamental Research (TIFR), Bombay. His current intersts are in the areas of logic programming, reactive and real time programming, constraint solving, formal methods, specification and verification. He received his Ph.D in computer science from Indian Institute of Science, Bangalore in 1975 and has been a faculty member at Tata Institute of Fundamental Research since then. He has been a visiting/regular faculty member at Technological University of Eindhoven, University of Utrecht, IBM TJ Watson Research Centre, Pennsylvania State University, University of Illinois at Urbana-Champaign, INRIA and ENSMP, France. He has served on (and chaired) Program Committees of many International Conferences and has been on the Editorial Committees.     

The aditi deductive database system

Deductive databases generalize relational databases by providing support for recursive views and non-atomic data. Aditi is a deductive system based on the client-server model; it is inherently multi-user and capable of exploiting parallelism on shared-memory multiprocessors. The back-end uses relational technology for efficiency in the management of disk-based data and uses optimization algorithms especially developed for the bottom-up evaluation of logical queries involving recursion. The front-end interacts with the user in a logical language that has more expressive power than relational query languages. We present the structure of Aditi, discuss its components in some detail, and present performance figures.     

宝钢研制的全氢罩式炉控制系统分析

对宝钢研制的全氢罩式炉计算机控制系统的逻辑结构、工作原理及硬件配置进行了分析.该系统与引进的系统相比,在通讯方式、程序结构、操作分析、报警和开放性等方面都有所改进.     

济钢中厚板厂3500mm精轧机快速换辊自控系统

中厚板厂3500mm精轧机快速换辊自控系统，集可编程序控制器、变频传动技术、液压控制于一体。实现了工作辊、支承辊准确、快速地更换。通过网络技术与其他控制系统进行数据交换、操作及连锁，使轧制生产线实现了全自动化轧制，不仅改善了工人的劳动强度，还提高了产品的产量及质量，取得了巨大的社会效益及经济效益。     

Pruning Algorithms for Rule Learning

Pre-pruning and Post-pruning are two standard techniques for handling noise in decision tree learning. Pre-pruning deals with noise during learning, while post-pruning addresses this problem after an overfitting theory has been learned. We first review several adaptations of pre- and post-pruning techniques for separate-and-conquer rule learning algorithms and discuss some fundamental problems. The primary goal of this paper is to show how to solve these problems with two new algorithms that combine and integrate pre- and post-pruning.     

Running programs backwards: The logical inversion of imperative computation

Imperative programs can be inverted directly from their forward-directed program code with the use of logical inference. The relational semantics of imperative computations treats programs as logical relations over the observable state of the environment, which is taken to be the state of the variables in memory. Program relations denote both forward and backward computations, and the direction of the computation depends upon the instantiation pattern of arguments in the relation. This view of inversion has practical applications when the relational semantics is treated as a logic program. Depending on the logic programming inference scheme used, execution of this relational program can compute the inverse of the imperative program. A number of nontrivial imperative computations can be inverted with minimal logic programming tools.     

大变量逻辑函数最佳覆盖问题研究

逻辑函数的最佳覆盖，一直是逻辑综合领域的关键环节。尤其是大变量逻辑函数最佳覆盖，对复杂的逻辑综合更为重要，但也更加困难。本文在对逻辑覆盖算法研究的基础上，提出了适合大变量逻辑函数最佳覆盖的Beister改进算法。经过大量算题的测试表明，改进的列覆盖算法在时间复杂度和选择效果方面均优于Beister算法。     

EDA实现的PLD遥控解码电路

介绍了电子设计自动化EDA (ElectricalDesignAutomation)技术的基本特点 ,以红外遥控为例 ,提出了一种PLD (可编程逻辑器件 )解码电路 ,并用ispLSI10 6 0实现 ,该电路原理简单、设计方便、工作可靠 ,可用于以键盘扫描为输入方式的智能仪器中。     

VHDL逻辑综合及FPGA实现

运用ＶＨＤＬ语言描述了一个１２×１２位的高速补码阵列乘法器。重点是运用ＶＨＤＬ逻辑综合优化该乘法器，并进行了乘法器的ＸｉｌｉｎｘＦＰＧＡ实现、功能仿真和时序仿真。经选用ＸＣ４００５ＰＣ－８４－４芯片进行验证，证明了其正确性