LDD方法在提高电路工作电压中的应用研究

研究了利用轻掺杂漏结构来制作高电源电压器件的工艺方法。分析了ＬＤＤ结构参数对器件击穿特性的影响，并结合实验结果对Ｎ＾－区的注入剂量，长度及引入的串联电阻进行了优化设计。     

应用于VLSI的PSSWS-LDD MOSFET优化工艺研究

提出实现VLSI的PSSWS(Poly Silicon Side Wall Spacer)—LDD(Lightly DopedDrain)结构,研究了它的形成工艺,获得多晶侧壁形成的优化工艺条件,制作出亚微米有效沟道长度的LDD NMOSFET。在器件性能研究和计算机模拟的基础上,得到PSSWS—LDDMOSFET的优化工艺实现条件;此条件下实现的有效沟道长为0.8μm的PSSWS—LDDNMOSFET,源漏击穿电压达20V,常规器件的小于16V;衬底电流较常规器件的减小约二个数量级。利用此优化条件,研制出高性能的1μm沟道长度的CMOS CD4007电路,2μm沟道长的21级CMOS环振,LSI CMOS 2.5μm沟道长度的门阵列电路GA 300 5SD。结果表明:PSSWS—LDD MOSFET性能衰退小,速度快,可靠性高,适用于VLSI的制造。     

Robust LQG controller design for lightly damped uncertain linear systems

In this note, we consider lightly damped uncertain linear systems with natural frequency variations. This type of uncertainty has multiple uncertain parameters with multiple rank structure. It is well known that the conventional LQG or LQG/LTR methods can not be applied to such system bccause of the instability and the design conservatism. To overcome such shortcomings, we propose a systematic method to design robust LQG controllers. The proposed method requires only the LQG tuning parameters and the structure information of uncertainty. It will be shown that our approach can be effectively applied to flexible structure control design problems. Center for Noise and Vibration Control (NoViC), Dept. of Mech Eng., Korea Advanced Institute of Science and Technology (KAIST)     

轻烧白云石轻质墙体材料的研究

将白云石在合理的温度和时间下煅烧 ,以煅烧后的白云粉为主要原材料 ,配以调和剂以及各种外加剂、活性改性材料 ,在常温常压条件下自然养护 ,制成轻质内墙砌块、陶粒空心砌块及玉米秸轻质隔墙板。具有生产工艺简单、投资小、成本低廉、轻质高强等优点     

低温基区轻掺杂硅双极晶体管的温度比例因子设计规则

通过对电流增益温度模型的分析，表明发射区重掺杂引起的禁带变窄效应是低温下双极晶体管电流增益衰变的主要原因，提出了用温度比例因子设计低温基区轻掺杂双极晶体管的新设计方法，计算机模拟表明结果良好。     

PECVD制程中磷烷轻掺杂N+A-SI成膜稳定性的研究

为解决G8.5世代线PECVD制程中磷烷轻掺杂N+A-SI成膜中频繁出现反射功率超过3000 W导致的沉积中断,研究了磷烷流量、RF Generator的匹配特性及RFoffset的电极间距对磷烷轻掺杂N+A-SI成膜中最大反射功率的影响,实验结果表明,在电极间距为20.875~21.875 mm之间进行RFoffset可显著降低磷烷轻掺杂N+A-SI成膜中的最大反射功率至3000 W以内,保证磷烷轻掺杂N+A-SI成膜过程的稳定,且该方法可有效地解决此问题,而提高磷烷流量及使用匹配特性较好的RF Generator解决该问题均存在一定的局限性。     

Application of fluorine doped oxide (SiOF) spacers for improving reliability in low temperature polycrystalline thin film transistors

The novel process of self-aligned fluorine doped oxide (SiOF) spacers on low temperature poly-Si (LTPS) lightly doped drain (LDD) thin film transistors (TFTs) is proposed. A fluorine doped oxide spacers were provided to generate the lower dissociation Si-F bonds adjusted to the interface of the drain which is the largest lateral electric field region for lightly doped drain structure. The stronger Si-F bonds can reduce the bonds broken by impact ionization. It is found that the output characteristics of SiOF spacers TFTs show the superior immunity to kink effect. The degradations in Vth shifting, subthreshold slope, drain current and transconductance of SiOF spacers after DC stress are improved.     

An investigation of lightly profiled sandwich panels subject to local buckling and flexural wrinkling effects

Sandwich panels exhibit various types of failure modes depending on the steel face used. For the flat and lightly profiled sandwich panels, flexural wrinkling is an extremely important design criterion as the behaviour of these panels is governed mainly by flexural wrinkling. However, in the lightly profiled panels, when the depth or spacing of the ribs increases, flat plate buckling between the ribs occurs leading to the failure of the entire panel due to the interaction between local buckling and flexural wrinkling modes. Current design formulae for sandwich panels do not consider such interactive buckling effects. To obtain a safe design solution, this interactive buckling behaviour should be taken into account in the design of lightly profiled sandwich panels. Therefore a research project was undertaken to investigate the interactive buckling behaviour of lightly profiled panels with varying depths and spacings of the ribs using a series of experiments and finite element analyses. A new improved design formula was developed for the safe and economical design of lightly profiled panels that takes into account the interaction between local buckling and flexural wrinkling. This paper presents the details of this investigation, the results and the new design formula.     

Fabrication of porous silicon nanowires by MACE method in HF/H2O2/AgNO3 system at room temperature

In this paper, the moderately and lightly doped porous silicon nanowires (PSiNWs) were fabricated by the ‘one-pot procedure’ metal-assisted chemical etching (MACE) method in the HF/H₂O₂/AgNO₃ system at room temperature. The effects of H₂O₂ concentration on the nanostructure of silicon nanowires (SiNWs) were investigated. The experimental results indicate that porous structure can be introduced by the addition of H₂O₂ and the pore structure could be controlled by adjusting the concentration of H₂O₂. The H₂O₂ species replaces Ag⁺ as the oxidant and the Ag nanoparticles work as catalyst during the etching. And the concentration of H₂O₂ influences the nucleation and motility of Ag particles, which leads to formation of different porous structure within the nanowires. A mechanism based on the lateral etching which is catalyzed by Ag particles under the motivation by H₂O₂ reduction is proposed to explain the PSiNWs formation.     

焦炭石灰竖窑生产轻烧白云石的工艺调整

介绍应用石灰竖窑生产轻烧白云石的工艺调整及其实践。