热循环条件下高密度倒装微铜柱凸点失效行为分析

基于圣维南原理,采用全局模型和子模型相结合的建模方针,建立倒装芯片封装的有限元模型.分析热循环条件下微铜柱凸点的应力及应变分布,研究高密度倒装芯片封装微铜柱凸点的失效机理,对关键微铜柱凸点的裂纹生长行为进行分析.结果表明,距芯片中心最远处的微铜柱凸点具有最大的变形与应力,为封装体中的关键微铜柱凸点;累积塑性应变能密度主要分布在关键微铜柱凸点的基板侧,在其外侧位置最大,向内侧逐渐减小,这表明裂纹萌生在基板侧微铜柱凸点外侧,向内侧扩展,试验结果与模拟结果相一致.     

基于热-结构耦合的叠层金凸点应力分析

建立了叠层金凸点三维有限元分析模型,通过Isight软件对该模型进行了热-结构耦合分析,获取了热-结构耦合条件下叠层金凸点等效应力的分布规律,分析了叠层金凸点结构尺寸变化对应力的影响,通过方差分析获得了下层凸点直径、下层凸点高度、上层凸点直径、上层凸点高度因素对应力影响的显著性.结果表明,最大应力点都出现于远端角落处的凸点,随着凸点高度的增加,最大应力值逐渐减小.在置信度为90%的情况下,下层凸点直径对应力有显著影响,因素显著性排序为,下层凸点直径最大,其次为上层凸点直径,再次为下层凸点高度,最后是上层凸点高度.     

改进的Lippmann煤层平动突出模型

应用Hoek-Brown强度理论对Lippmann煤层平动突出模型进行了改进，综合考虑了强度、结构等因素对煤层平动突出的影响，研究了水平煤层从巷道两帮突出前临界状态下的应力分布规律.赵各庄矿的实例研究表明，改进后的Lippmann煤层平动突出模型适用于顶底板为岩石的煤巷或半煤岩巷煤层整体冲击的机理分析，为合理确定煤层突出范围度量指标以及煤层整体平动突出倾向性的判定提供了理论依据.     

The reactions between electroless Ni-Cu-P Deposit and 63Sn-37Pb flip chip solder bumps during reflow

This study investigates the interfacial reactions between electroless Ni-Cu-P deposit and 63Sn-37Pb solder bumps under various reflow conditions. The morphology of the intermetallic compounds formed at the Ni-Cu-P/Sn-Pb interface changes with respect to reflow cycle, reflow temperature, and reflow time. The (Ni,Cu)₃Sn₄ compounds with three different morphologies of fine grain, whisker, and polygonal grain form at the Ni-Cu-P/Sn-Pb interface after reflow at 220°C for 15 s. The whisker-shape and polygonal grains detach from the Ni-Cu-P deposit into the Sn-Pb solder during multiple reflows. The (Ni,Cu)₃Sn₄ compound grows rapidly when the reflow temperature is above the Ni-Sn eutectic temperature, 231°C. A continuous (Ni,Cu)₃Sn₄ layer forms after reflow at 220°C for 10 min. A 4.5 μm Ni-Cu-P deposit prevents the interdiffusion of Sn and Al atoms across the Ni-Cu-P deposit after 10 reflow cycles at 220°C for 15 s and after reflow at 220°C for 10 min.     

A study aimed at characterizing the interfacial structure in a tin-silver solder on nickel-coated copper plate during aging

This paper highlights the interfacial structure of tin-silver (Sn-3·5Ag) solder on nickel-coated copper pads during aging performance studies at a temperature of 150°C for up to 96 h. Experimental results revealed the as-solidified solder bump made from using the lead-free solder (Sn-3·5Ag) exhibited or showed a thin layer of the tin-nickel-copper intermetallic compound (IMC) at the solder/substrate interface. This includes a sub-layer having a planar structure immediately adjacent to the Ni-coating and a blocky structure on the inside of the solder. Aging performance studies revealed the thickness of both the IMC layer and the sub-layer, having a planar structure, to increase with an increase in aging time. The observed increase was essentially non-linear. Fine microscopic cracks were observed to occur at the interfaces of the planar sub-layer and the block sub-layer.     

Pb/Sn凸点的制备

介绍了用电镀法制备Pb / Sn凸点的工艺,包括:凸点的设计,圆片的准备,溅射UBM(凸点下金属层),厚膜光刻,电镀Cu柱, Pb / Sn凸点,回流凸点等。结果表明:采用电镀法可以得到球形Pb / Sn凸点,50μm的厚胶工艺是可行的。     

氧化层对于倒装焊接质量的影响和分析

利用氧化铟易于溶于酸性溶液的性质,提出了在倒装焊接之前使用酸性溶液对铟柱进行酸洗.在未进行酸洗和进行酸洗的条件下,对比了样品在焊接之后的拉力以及在经过热循环后的盲元率,结果显示酸洗能够降低表面氧化层的影响,有效地改善倒装焊接的质量.     

冲击倾向性煤体破坏过程声热效应的试验研究

介绍自行设计的多系统、同步监测试验机构，并对冲击倾向性煤体分别进行单向加载和循环加载破坏试验。利用系统所具有的红外热像、声发射、应变等监测方式，分析两种加载条件下，冲击倾向性煤体破坏过程的声、热效应及破坏前的异常信息特征。对比研究不同监测方式下，冲击倾向性煤体中同一破坏事件的响应速度以及各自响应的灵敏度；获得冲击倾向性煤体的固有物理力学特性，并发现强冲击倾向性和非冲击倾向性煤体单轴压缩时的最终破坏前兆点分别为0．9和0．7个荷载强度比，也说明强冲击倾向性煤体的失稳破坏更突然、更难于预测。     

薄膜金属化LTCC基板的薄膜阻碍层对共晶焊的影响

讨论了LTCC工在板薄膜金属化技术中,有效阻碍层的选择对基板共晶焊的影响。实验结果表明,Ti/Ni是一种高可靠性的阻碍层,而且Ti/Ni/Au也是一种较理想的LTCC基板薄膜金属化结构。     

The application of flip-chip bonding interconnection technique on the module assembly of 10 Gbps laser diode

Flip chip bonding technique using Pb/In solder bumps was applied to packaging of a 10 Gbps laser diode (LD) submodule for high speed optical communication systems. The effect of the flip-chip bonding interconnection technique instead of conventional wire bonding was investigated for high speed broad band devices. The broad band performance of 10 Gbps LD submodule was simulated using SPICE S/W and compared with experimental results. In this simulation, the 10 Gbps LD was modeled in a parallel RC circuit. The values of R and C used for the equivalent circuit were 5ω and 1 pF, respectively. The LD was placed in series with a 18ω thin film resistor to prevent the impedance mismatch between the LD and a 25ω transmission line. The dependence of parasitic parameters on the small signal modulation bandwidth and the scattering parameters of the LD submodule was investigated and analyzed up to 20 GHz. A small signal modulation bandwidth of 14 GHz at 10 mA dc bias current and the clean modulation response up to 20 GHz were found for the flip-chip bonded submodule. The bandwidth of flip-chip bonded 10 Gbps LD submodule is wider than that of the wire-bonded LD submodule by a difference of 3.8 GHz.