高多层超长高速背板工艺研究

相比常规高多层背板而言,超长背板的尺寸稳定性较难控制,孔到线距离越来越小,层间对准度要求越高。文章主要介绍一种34层超长板的关键制作工艺,包括涨缩的管控,层间对准度的控制,背钻堵孔的改善,阻抗的控制等,为重点关键流程提供制作方法及解决方案。     

一种高速背板用高密度数据传输连接器设计

本文从理论设计、仿真分析和产品测试三个方面对一种高速背板用高密度数据传输连接器进行了分析设计。通过对连接器差分信号的特征阻抗、串扰、插入损耗等参数的分析,对连接器的插针接触件、PCB传输线和介质体进行了设计。此外,采用电磁场与电路联合仿真的分析方法,从时域、频域和数据域三个方面对所设计的连接器进行了仿真分析。最后,通过测试夹具对所设计的连接器进行了信号完整性测试,测试结果表明：连接器具有良好在高速传输性能,在高速传输通信系统中具有良好的应用前景。     

浅谈背板制作及发展趋势

背板是近年来发展迅速的PCB产品,集多种PCB制作技术难点于一身,代表了PCB行业的先进技术。目前,背板在通信技术、航空航天以及军工技术等领域获得了越来越广泛的应用,众多实力雄厚的PCB厂商为此展开了激烈的技术与市场竞争。本文对PCB制造业中背板制作难点及技术市场进行了分析,可供同行参考借鉴。     

Excimer laser fabrication of diffractive optical elements

Excimer lasers are well known for their ability to machine features on the micron scale. Recently, they have been used to fabricate diffractive optical elements (DOEs). These elements are patterns of pixels machined to the depth required, in order that a reconstructed pattern is formed in the image plane when the DOE is illuminated by a coherent source. The patterns are designed using computer phase retrieval code. These designs are used to create XY co-ordinate data files for conversion to machining routines where the pixels are machined individually. The laser used is an ArF excimer operating at 193 nm. We describe research undertaken on the fabrication and testing of some typical DOEs. The measurements include efficiency of reconstruction as well as the measurements of profile and surface roughness. The work compares the reconstruction results with the topographical measurements made on the DOE for 2, 4 and 8 phase-level designs. Newly developed simulation code was used to generate reconstructions without machining imperfections.     

Comparative study of signalling methods for high-speed backplane transceiver

A combined analysis of transient simulation and statistical method is proposed for comparative study of signalling methods applied to high-speed backplane transceivers. This method enables fast and accurate signal-to-noise ratio and symbol error rate estimation of a serial link based on a four-dimension design space, including channel characteristics, noise scenarios, equalisation schemes, and signalling methods. The proposed combined analysis method chooses an efficient sampling size for performance evaluation. A comparative study of non-return-to-zero (NRZ), PAM-4, and four-phase shifted sinusoid symbol (PSS-4) using parameterised behaviour-level simulation shows PAM-4 and PSS-4 has substantial advantages over conventional NRZ in most of the cases. A comparison between PAM-4 and PSS-4 shows PAM-4 gets significant bit error rate degradation when noise level is enhanced.     

一种高速大容量背板的设计与实现

背板是通信设备的要求.采用传统的板卡平行连接结构的背板,要继续增加带宽已经非常困难,从而成为制约系统容量的一个瓶颈.本文给出了一种采用前后交叉连接结构的高速大容量背板的具体设计实现,在保证信号完整性前提下大大降低了设计难度,其总带宽达到1Tb/s.     

基于maxDNA系统的以太网103协议冗余设计

自动化领域中使用103协议的保护测控装置非常多,但是max DNA分散控制系统的通信模块不支持103协议。介绍了基于max DNA系统SBP技术的南自以太网103主站协议的设计,重点讲述了103主站的几种冗余模式设计,分析了各自的优缺点,并测试了双主站双网冗余模式的性能。基于max DNA系统的以太网103主站,与从站采用UDP报文与TCP报文相结合的方式通信,提高了信息传输的及时性,保证了数据的完整性和正确性,多种冗余方式的支持,可根据现场应用的具体需求选择适用的冗余模式,增加了系统的安全可靠性和灵活性。     

Oxide TFT with multilayer gate insulator for backplane of AMOLED device

Abstract— An indium gallium zinc oxide (IGZO) film with an amorphous phase was deposited and had a very flat morphology with a RMS value of 0.35 nm. IGZO TFTs were fabricated on a glass substrate by conventional photolithography and wet‐etching processes. IGZO TFTs demonstrated a high mobility of 124 cm²/V‐sec, a high on/off ratio of over 10⁸, a desirable threshold voltage of 0.7 V, and a sub‐threshold swing of 0.43 V/decade. High mobility partially resulted from the fringing‐electric‐field effect that leads to an additional current flow beyond the device edges. Therefore, considering our device geometry, the actual mobility was about 100 cm²/V‐sec, and had a very low dependence on the variation of W/L (channel width and length) and thickness of the active layer. IGZO TFTs were also fabricated on a flexible metal substrate for a conformable display application. TFT devices showed an actual mobility of 72 cm²/V‐sec, a high on/off ratio of ～10⁷, and a sub‐threshold swing of 0.36 V/decade. There was no significant difference before, during, or after bending. Moreover, an IGZO TFT array was fabricated and a top‐emitting OLED device was successfully driven by it. Therefore, the oxide TFT could be a promising candidate as a backplane for OLED devices.     

Reducing data dependent jitter utilising adaptive FIR pre-emphasis in 0.18 μm CMOS

Due to advances of technology in multimedia applications in recent years, the demand for high user end bandwidth point to point links has increased significantly. Jitter requirements have become ever more stringent with the increase in high speed serial link data rates. The introduced jitter severely degrades the performance of the high speed serial link. This paper introduces an adaptive FIR pre-emphasis technique as a means to alleviate the problem of limited off-chip bandwidth introducing data dependant jitter. Mathematical as well as SPICE simulation results are presented, together with the implemented integrated circuit layouts of the novel 0.18 μm CMOS implementation. Limited results from the experimentally tested IC are also presented and discussed. The adaptive pre-emphasis technique employed results in a simulated data dependant jitter reduction to less than 12.5% of a unit interval at a data rate of 5 Gb/s and a modelled 30″ FR-4 backplane copper channel.     

基于代理模型的高速互联背板传输载体电磁兼容特性分析

针对电子整机中高速互联背板传输载体运用有限元法分析电磁兼容计算周期过长问题．采用有限元仿真分析软件AnsoftHfss、均匀试验设计和径向基神经网络（RBFNN）构建高速互联背板传输载体电磁兼容分析的代理模型,并对构建流程进行详细介绍。通过算例分析,证明该方法在保证一定精度前提下较好降低了电子整机中高速互联背板传输载体电磁兼容学科的计算周期。