铁电存储场效应晶体管I-V特性的物理机制模拟

文章讨论的模型主要描述了铁电存储场效应晶体管（FEMFET）的I-V特性。从理论结果可反映出几何尺寸效应和材料参数对晶体管电特性的影响。传统的阈值电压的概念巳不再适用，由于铁电层反偏偶极子的开关作用，自发极化的增加对存储器的工作状态产生很小的影响。该模型可用于设计和工艺参数的优化，并由直观原型的方法得到了验证。     

BaMgF4 thin film development and processing for ferroelectric FETS

Abstract

A ferroelectric memory field-effect transistor (FEMFET) where a ferroelectric thin film is incorporated directly into the gate structure of the transistor is attractive, because it provides not only nonvolatility, but also nondestructive readout (NDRO). At Westinghouse, we are currently developing a FEMFET using thin film barium magnesium fluoride (BaMgF₄), a ferroelectric material that was discovered in 1969, but was not fabricated in thin film form until 1989. The BaMgF₄ films are grown by evaporation in an ultrahigh vacuum (UHV) chamber on clean Si(100). The natural tendency of these films to grow with the ferroelectric a-axis in the Si(100) plane has been overcome to obtain more random orientation with larger reversible polarization perpendicular to the film. A capping layer (SiO₂) has been found to be essential for process integrability of these BaMgF₄ films. Ti-W metallization produced only a slight reduction in the capacitance-voltage (C-V) memory window. Switching speed of these films has been measured to be 40 to 45 nanoseconds. The first FEMFET fabricated with BaMgF₄ has exhibited 18 Volt memory hysteresis window with better than 10⁵ on/off current ratio for 20 Volt programming.     

A nonvolatile single ferro fet memory concept with disturbance free operation scheme

Abstract

A novel AND-type ferroelectric field effect transistor memory concept for solid state mass storage applications is described. Disturbance problems caused by disturbance pulses between adjacent memory cells are prevented by device improvements and by choosing appropriate programming and read voltages.

The memory array presented here uses global source lines each of which is connected to its own sense amplifier. Disturbance free and fully functional operation of the memory concept has been demonstrated by circuit simulations. The results of the simulations yield a data access time comparable to DRAMs.