Modeling ion implantation of HgCdTe

Ion implantation of boron is used to create n on p photodiodes in vacancy-doped mercury cadmium telluride (MC.T). The junction is formed by Hg interstitials from the implant damage region diffusing into the MC.T and annihilating Hg vacancies. The resultant doping profile is n⁺/n^-/p, where the n⁺ region is near the surface and roughly coincides with the implant damage, the n^- region is where Hg vacancies have been annihilated revealing a residual grown-in donor, and the p region remains doped by Hg vacancy double acceptors. We have recently developed a new process modeling tool for simulating junction formation in MC.T by ion implantation. The interstitial source in the damage region is represented by stored interstitials whose distribution depends on the implant dose. These interstitials are released into the bulk at a constant, user defined rate. Once released, they diffuse away from the damage region and annihilate any Hg vacancies they encounter. In this paper, we present results of simulations using this tool and show how it can be used to quantitatively analyze the effects of variations in processing conditions, including implant dose, annealing temperature, and doping background.     

分子束外延生长3英寸HgCdTe晶片

报道了用分子束外延的方法制备3英寸HgCdTe薄膜的研究结果,获得的HgCdTe外延材料均匀性良好,在直径70mm圆内,组份标准偏差率为1.2%,对应80K截止波长偏差仅为0.1μm.经过生长条件的改进,表面形貌获得了大幅度改善,缺陷密刃∮00cm-2,缺陷尺寸小于10μm,可以满足大规模HgCdTe焦平面列阵的应用需求.抖     

From Long Infrared to Very Long Infrared Wavelength Focal Plane Arrays Made with HgCdTe n + n ?/ p Ion Implantation Technology

This paper aims at studying the feasibility of very long infrared wavelength (VLWIR) (12–18 μm) focal plane arrays using n-on-p planar ion-implanted technology. To explore and analyze the feasibility of such VLWIR detectors, a set of four Cd _x Hg_1−x Te LPE layers with an 18 μ cutoff at 50 K has been processed at Defir (LETI/LIR–Sofradir joint laboratory), using both our “standard” n-on-p process and our improved low dark current process. Several 320 × 256 arrays, 30-μm pitch, have been hybridized on standard Sofradir readout circuits and tested. Small dimension test arrays characterization is also presented. Measured photonic currents with a 20°C black body suggest an internal quantum efficiency above 50%. Typical I(V) curves and thermal evolution of the saturation current are discussed, showing that standard photodiodes remain diffusion limited at low biases for temperatures down to 30 K. Moreover, the dark current gain brought by the improved process is clearly visible for temperatures higher than 40 K. Noise measurements are also discussed showing that a very large majority of detectors appeared background limited under usual illumination and biases. In our opinion, such results demonstrate the feasibility of high-performance complex focal plane arrays in the VLWIR range at medium term.     

Room temperature characterization of Hg1-xCdxTe P-on-n heterostructure photodiodes

Measurements of 77K R_oA and 300K reverse bias dynamic impedance (R_dA) products at one volt reverse bias has been carried out to assess the degree of correlation of this figure of merit. Planar P-on-n heterostructures were grown on near lattice-matched CdZnTe substrates with Hg_1-xCd_xTe (0.20< x <0.30) by molecular beam epitaxy. These devices were passivated with CdTe and doped with indium and arsenic as n- and p-type dopants, respectively. Current-voltage characteristic of these devices exhibit thermally generated dark currents at small and modest reverse bias. We have observed that R_oA values of these long wavelength infrared P-on-n heterostructure photodiodes at 77K correlate with room temperature R_dA values. Diode arrays with high room temperature R_dA values at one volt reverse bias also have high R_oA values at 77K. Similarly, low R_dA values at room temperature indicate poor performance at 77K where deviation from diffusion current occurs at reverse bias of 0.2 to 1 volt at room temperature. The results presented here, for a small samples of devices, demonstrate that room temperature measurements of current-voltage characteristics to evaluate Hg_1-xCd_xTe (0.22< x <0.28) diode performance and array uniformity at lower temperatures can be used. This provides an acceptable criteria for further study at lower temperatures.     

Comparison of spatial compositional uniformity and dislocation density for organometallic vapor phase epitaxial Hg1−x CdxTe grown by the direct alloy and interdiffused growth processes

Etch pit density and spatial compositional uniformity data are presented for organometallic vapor phase epitaxial Hg_1−x Cd_x Te grown by the direct alloy and interdiffused growth methods. For alloy growth, composition variation is as low as Δx=0.004 and 0.02 over 2- and 3-in diam areas, respectively; while for growth on CdZnTe substrates, etch pit density values lower than 2×10⁵ cm⁻² have been achieved. For interdiffused growth on CdZnTe, etch pit density values lower than 5×10⁵ cm⁻² have been obtained, while the composition variation is usually Δx≤0.004 and 0.014 over 2- and 3-in diam areas, respectively. Data demonstrate that the choice of particular CdZnTe substrate strongly affects the subsequent etch pit density measured in the layer. Reasonably uniform n-type doping over 3-in diam area using the source triethylgallium is also reported for both growth methods.     

Electrical characterization of very-narrow-gap bulk HgCdTe single crystals by variable magnetic field hall measurements

Variable-magnetic-field Hall measurements (0 to 1.5 T) are performed on very-narrow-gap bulk-grown Hg_1−xCd_xTe single crystals (0.165 ≤ x ≤ 0.2) at various temperatures (10 to 300K). The electron densities and mobilities are obtained within the one-carrier (electrons) approximation of the reduced-con-ductivity-tensor scheme. The present data together with the selected data set reported by other workers exhibit a pronounced peak when the electron mobility is plotted against the alloy composition x-value which has been predicted to be due to the effective-mass minimum at the bandgap-crossing (E_g ≈ 0). The observed position (x ≈ 0.165), height (≈4 x 10² m²Vs), and width (≈0.01 in x) of the mobility-peak can be explained by a simple simulation involving only ionized-impurity scattering. A lower bound of the effective mass is introduced as a fitting parameter to be consistent with the finiteness of the observed electron mobility and is found to be of the order of 10⁻⁴ of the mass of a free electron.     

布里奇曼法生长碲镉汞晶体的固液界面形态研究

文中综述了布里奇曼法及加速坩埚旋转技术的布里奇曼法生工碲镉汞晶体过程中固液界面形态的研究结果，简单讨论了固液界面形态对组分分布的影响，并将两种技术所得的组分分布结果进行了比较，在分析影响固液界面形态因素的基础上，认为加速坩埚旋转技术是目前改善固液界面形态的有效方法。     

Growth and characterization of hot-wall epitaxial CdTe on (111) HgCdTe and CdZnTe substrates

Thin CdTe films were deposited by hot-wall epitaxy (HWE) on (111) HgCdTe and CdZnTe substrates at temperatures from about 140 to 335°C. X-ray rocking curves were used to show that crystal quality of the CdTe (111)B films improved as substrate temperature increased from 140 to about 250°C. Rocking curve values for full width at half maximum (FWHM) decreased from 2–4 degrees at 140–150°C to less than 100 arc-s at 250°C, and a FWHM of 59 arc-s was the lowest value observed near 250°C. The FWHM of the HWE CdTe was found to be insensitive to growth rate below about 400Å/min, but increased to four degrees at 1250Å/min. X-ray diffraction confirmed that films grown on the B-face at higher temperatures were epitaxial, but contained a significant volume fraction, 35% to 50%, of rotational in-plane twins. Electron microscopy confirmed a coarse twin density, and photoluminescence spectra showed an absence of excitonic emission in the HWE films. Simultaneous growth on two (111) HgCdTe substrates with different surface polarities between 230°C and 335°C showed that deposition rate on the A-face decreased relative to that on the B-face as temperature increased. Films grown on the B-face exhibited better surface morphologies than those grown on the A-face.     

p型碲镉汞液相外延材料Ag掺杂的研究

利用SIMS和变温霍尔测量手段对P型Hg0.77Gd0.23Te液相外延材料的Ag掺杂技术、机理及掺杂碲镉汞材料的性能进行了研究。结果表明采用AgNO3溶液直接浸泡方式对该材料进行掺Ag是成功的，掺杂浓度与被掺杂材料中的汞空位浓度是一致的，掺杂后，P型碲镉汞材料的受主能级比掺杂前有明显的减小，从实验结果可看到掺Ag碲镉汞材料的电学性能在室温下保持稳定。     

非接触式半导体少子寿命测试方法——微波反射法

介绍了一种非接触式用于测量少子寿命的微波反射法，并与通常的光电导衰退法进行了比较。