High-k材料MOS器件的PISCES-II模拟

High-k材料是指介电常数k高于SiO2的材料。使用high-k材料做栅绝缘层,是减小MOS器件栅绝缘层直接隧道击穿(DirectTunneling,DT)电流的有效方法。文章在二维器件模拟软件PISCES-II中添加了模拟以high-k材料为栅绝缘层的MOS器件模型,并对SiO2和high-k材料的MOS晶体管器件特性进行了模拟比较,成功地验证了所加high-k材料MOS器件模型的正确性。改进后的PISCES-II程序,可以方便地对以各种high-k材料为栅绝缘层的器件性能进行模拟。     

Flat band voltage modulation of AlGaN/GaN MOS capacitor with stacked Al2O3/La2O3 high dielectric structures

AlGaN/GaN metal-oxide-semiconductor (MOS) capacitor structures using atomic layer deposited high-dielectric-constant (High-k) Al₂O₃/La₂O₃ bilayer films as dielectric have been investigated using high-frequency capacitance-voltage measurement. The stable thickness and uniform surface morphology of the bilayer films with different La/Al deposition cycle ratio (La/Al ratio) were observed after rapid thermal annealing by spectroscopic ellipsometry and atomic force microscopy, respectively. We have found that with a decrease of the La/Al ratio, the dipole layer observed by X-ray photoelectron spectroscopy at Al₂O₃/La₂O₃ interfaces is close to the surface of semiconductor and the flat band voltage shifts to the negative direction. Furthermore, the dramatic drop in dielectric constant of the films as La/Al ratio decrease was caused by the formation of La(OH)₃ in La₂O₃. Finally, the reason for the flat band voltage shifts, which is based on the dielectric constant of Al₂O₃ and La₂O₃ comprising the position of dipole layer in the dielectric films, is proposed.     

Solution-processed ytterbium oxide dielectrics for low-voltage thin-film transistors and inverters

High permittivity (high k) metal-oxide thin films fabricated via solution processes have recently received much attention for the construction of low-operating voltage and high-performance thin-film transistors (TFTs). In this report, amorphous ytterbium oxide (Yb₂O₃) thin films were fabricated by spin coating and their applications in TFTs were explored. The physical properties of the solution-processed Yb₂O₃ thin films processed at different annealing temperatures were systematically investigated using various characterization techniques. To explore the feasibility of the Yb₂O₃ thin films as gate dielectrics for oxide TFTs, In₂O₃ TFTs based on Yb₂O₃ dielectrics were integrated. All the devices could be operated at 3 V, which is critical for the applications in portable, battery-driven, and low-power electronic devices. The optimized In₂O₃/Yb₂O₃ TFT exhibits high electrical performances, including field-effect mobility of 4.98 cm²/V s, on/off current ratio of ~ 10⁶, turn-on voltage around 0 V, and subthreshold swing of 70 mV/decade, respectively. To demonstrate the potential of In₂O₃/Yb₂O₃ TFT toward more complex logic application, the unipolar inverter was further constructed.     

HfAlOx high-k gate dielectric on SiGe: Interfacial reaction, energy-band alignment, and charge trapping properties

Ultra thin HfAlO_x high-k gate dielectric has been deposited directly on Si_1−xGe_x by RF sputter deposition. The interfacial chemical structure and energy-band discontinuities were studied by using X-ray photoelectron spectroscopy (XPS), time of flight secondary ion mass spectroscopy (TOF-SIMS) and electrical measurements. It is found that the sputtered deposited HfAlO_x gate dielectric on SiGe exhibits excellent electrical properties with low interface state density, hysteresis voltage, and frequency dispersion. The effective valence and conduction band offsets between HfAlO_x (E_g = 6.2 eV) and Si_1−xGe_x (E_g = 1.04 eV) were found to be 3.11 eV and 2.05 eV, respectively. In addition, the charge trapping properties of HfAlO_x/SiGe gate stacks were characterized by constant voltage stressing (CVS).     

The effect of Se and Se/Al passivation on the oxidation of Ge

The molecular and atomic oxidation of molecular beam deposited Se passivating layers on Ge substrates was in situ investigated by X-ray photoelectron spectroscopy. It turns out that while Se is efficient in suppressing Ge oxidation upon molecular oxygen exposure, an extra thin Al layer is needed to protect the Ge surface from highly reactive atomic oxygen radicals. Electrical measurements performed on the Al-covered surfaces reveal that Se is beneficial in reducing the interface state density.     

Stackable nonvolatile memory with ultra thin polysilicon film and low-leakage (Ti, Dy)xOy for low processing temperature and low operating voltages

We report the fabrication process as well as material and electrical characterization of ultra thin body (UTB) thin film transistors (TFTs) for stackable nonvolatile memories by using in situ phosphorous doped low-temperature polysilicon followed by the chemical mechanical polishing (CMP) process. The resulting polysilicon film is about 13 nm thick with approximately 10¹⁹ cm⁻³ doping. Root mean square surface roughness below 1 nm is achieved. Metal nanocrystals and high-k dielectric are selected for storage nodes and tunneling barriers to achieve low operating voltages. The number density and average diameter of nanocrystals embedded in the gate stack are 7.5 × 10¹¹ cm⁻² and 5.8 nm, respectively. Furthermore, scanning transmission electron microscopy (STEM), convergent beam electron diffraction (CBED) and electron energy loss spectroscopy (EELS) are performed for material characterization. The dielectric constant of the (Ti, Dy)_xO_y film is 35, and the off-state leakage current at −1 V bias and 2.8 nm equivalent oxide thickness is 5 × 10⁻⁷ A/cm². We obtain a memory window of about 0.95 V with ±6 V program/erase voltages. Our results show that UTB TFT is a promising candidate for the three-dimensional integration in high-density nonvolatile memory applications.     

High mobility strained Si0.5Ge0.5/SSOI short channel field effect transistors with TiN/GdScO3 gate stack

Short channel p-type metal-oxide-semiconductor field effect transistors (MOSFETs) with GdScO₃ gate dielectric were fabricated on a quantum well strained Si/strained Si_0.5Ge_0.5/strained Si heterostructure on insulator. Amorphous GdScO₃ layers with a dielectric constant of 24 show small hysteresis and low density of interface states. All devices show good performance with a threshold voltage of 0.585 V, commonly used for the present technology nodes, and high I_on/I_off current ratios. We confirm experimentally the theoretical predictions that the drive current and the transconductance of the biaxially strained (1 0 0) devices are weakly dependent on the channel orientation. The transistor’s hole mobility, extracted using split C-V method on long channel devices, indicates an enhancement of 90% (compared to SiO₂/SOI transistors) at low effective field, with a peak value of 265 cm²/V s. The enhancement is however, only 40% at high electrical fields. We demonstrate that the combination of GdScO₃ dielectric and strained SiGe layer is a promising solution for gate-first high mobility short channel p-MOSFETs.     

Spectroscopic ellipsometry characterization of high-k gate stacks with Vt shift layers

We have used spectroscopic ellipsometry (SE) to measure layer thicknesses of HfO₂/La₂O₃ and La₂O₃/HfO₂ stacks on SiO₂/p-Si. Two approaches to extract layer thicknesses from a single SE measurement were shown to be inaccurate, possibly due to similarities in the optical dispersions of HfO₂ and La₂O₃. The approach where SE data was collected after deposition of each layer and only the thickness of the top layer was determined by modeling was found to be capable of accurately measuring the thickness of each layer. These conclusions are supported by angle resolved X-ray photoelectron spectroscopy (ARXPS), X-ray reflectivity (XRR) and Rutherford backscattering spectroscopy (RBS) measurements.     

高介电常数栅介质材料研究动态

随着微电子技术的飞速发展,半导体器件的特征尺寸按摩尔定律不断缩小。SiO2作为MOSFET的栅介质材料巳不能满足技术发展的需求。为此,应用于下一代MOSFET的高介电常数栅介质材料已成为当今微电子材料的研究热点。文章介绍了高K材料抑制隧穿效应影响的原理及其应当满足的各项性能指标,并对其研究动态和存在的问题进行了阐述,指出了最有可能成为下一代MOSFET栅介质的几种高K材料。