High power devices in wide bandgap semiconductors

Silicon carbide (SiC) semiconductor devices for high power applications are now commercially available as discrete devices. Recently Schottky diodes are offered by both USA and Europe based companies. Active switching devices such as bipolar junction transistors (BJTs), field effect transistors (JFETs and MOSFETs) are now reaching the market. The interest is rapidly growing for these devices in high power and high temperature applications. The main advantages of wide bandgap semiconductors are their very hi...     

VDMOS场效应晶体管电路模型的构造及参数提取

从VDMOS的物理结构出发建立子电路模型,进而导出描述其交直流特性的参数及模型公式.相对以往文献的结果,该模型避免了过多工艺参数的引入,同时对子电路进行了有效的简化.在参数提取软件中的加载结果表明,该模型结构简单,运算速度快,物理概念清晰,拟合曲线与测试数据符合精度高(直流误差5%以内,交流误差10%以内),适于在电路模拟及参数提取软件中应用.     

JFET高精度可变电阻器的设计及其应用

根据JFET线性区漏源之间沟道电阻受栅源电压控制的机理,推导JFET电流公式,对可变电阻的性能进行了分析。通过PSpice软件仿真了JFTT压控可变电阻,提出了改善JFET可变电阻非线性及扩展电阻动态范围的方法。结合单片机和D/A转换器,利用该方法设计了程控JFET可变电阻,其阻值范围为75.703~141.004Ω,分辨率低于0.025Ω,满足了自动气象站信号模拟器温度通道所需电阻阻值范围80.305~130.894Ω及分辨率低于0.03Ω的要求,为数据采集器温度通道的检定提供标准的可变电阻信号。     

高性能结型场效应对管及其在ASIC中的应用

采用结型场效应管作为输入级的专用集成电路,一般都具有高速宽带以及高输入阻抗的特点。场效应管与双极型器件相结合,已成为新型专用型集成运算放大器的主要发展方向之一。国内在这些专用集成电路的研制工作中所面临的主要困难,是高耐压高频结型场效应对管的工艺制作。本文在介绍高性能结型场效应对管在ASIC中的应用及其工艺试验情况。     

Revisited generalized substitution theorem and its consequences for circuit analysis

The Substitution Theorem (ST) is generally perceived as a mere theoretical curiosity. In this paper, a formerly derived generalized ST (GST) is carefully revised, which leads to both a Weak Revisited GST (RGST) and a Strong RGST (characterized by noticeably relaxed hypotheses with respect to the GST). Then, despite the common opinion about the ST, such RGSTs are showed to be powerful analytical tools to generalize, make rigorous and rigorously prove several classic results of Circuit Theory, namely: the Substitution Theorem for Multiterminal Circuits, the Source‐Shift Theorem, the Thévenin–Norton Theorem, the Miller Theorem alongside its Dual, and the Augmentation Principle. More specifically, the Substitution Theorem for Multiterminal Circuits is extended to an arbitrary set of sources, possibly including nullors. The Source‐Shift Theorem is rigorously derived, and possible related ambiguities are removed. Also, all possible hybrid forms of the Thévenin–Norton Theorem for multiports are individuated, and a precise operative procedure for calculating the relevant entities is provided for all cases. Furthermore, the Miller Theorem and its Dual are extended to an arbitrary number of variables and to multiports. As to the Augmentation Principle, the constraint regarding the linearity of the augmenting resistors is removed. Finally, thoroughly worked examples are given in which the aforementioned noteworthy consequences of the RGSTs are proved to be efficient tools for analysis by inspection of linear and nonlinear circuits. Among the other things, systematic pencil‐and‐paper procedures for DC‐point and input‐output (or driving‐point) characteristic calculation in nonlinear networks are derived and applied to circuits with considerably complex topology. Copyright © 2016 John Wiley & Sons, Ltd.     

Development of InxGa1−xAs-based ohmic contacts for p-type GaAs by radio-frequency sputtering

In_xGa_1−xAs-based ohmic contacts which showed excellent contact properties for n-GaAs were demonstrated to be applicable to p-GaAs ohmic contacts. These contacts, prepared by radio-frequency sputtering, provided low contact resistance (0.2 Ω-mm), excellent thermal stability, smooth surface, and good reproducibility. The contact resistances had a weak dependence on the annealing temperatures, which was desirable in a manufacturing view point. This weak temperature dependence was explained to be due to a unique Schottky barrier height at the metal/p-In_xGa_1−xAs interface which does not depend on the In concentration in the In_xGa_1−xAs layer. The present experiment showed the possibility of simultaneous preparation of ohmic contacts for both n and p-GaAs using the same contact materials.     

Analytical and self-consistent quantum mechanical model for a surrounding gate MOS nanowire operated in JFET mode

We derive an analytical model for the electrostatics and the drive current in a silicon nanowire operating in JFET mode. We show that there exists a range of nanowire radii and doping densities for which the nanowire JFET satisfies reasonable device characteristics. For thin nanowires we have developed a self-consistent quantum mechanical model to obtain the electronic structure.     

一款JFET低噪声前置放大器的设计

为了与传感器相匹配,得到放大器的最小噪声系数,本文从对结型场效应管的等效输入电压噪声eN及等效输入电流噪声iN的分析中,得到结型场效应管的最佳源电阻比双极型晶体管要高出2-3个数量级的结论,并设计制作了一款结型场效应管低噪声前置放大器实用电路。并对其幅频特性、输入阻抗和等效输入电压噪声进行了测量,结果表明其输入阻抗高达71MΩ,等效输入电压噪声约为0.87nV／√Hz,是一种适合于高内阻传感器的较为理想的低噪声前置放大器电路,也可以通过阻抗变换后用于磁力仪等需要低噪声放大的场所。     

平面栅SiC MOSFET设计研究

碳化硅MOSFETs开关速率快,耐压高,在逆变器应用领域前景广阔。平面栅MOSFETs因其成熟的工艺是最先被商业化的器件。在平面栅MOSFETs的设计中,降低导通电阻和提高芯片的电流密度是重要的开发目标。基于自主研制的1 200 V及1 700 V SiC MOSFETs,研究了载流子扩展层技术、JFET注入技术以及元胞结构对器件电学特性的影响。测试结果表明采用方形元胞设计的SiC MOSFET的电流明显大于采用条形元胞设计的电流,JFET注入对阈值电压的影响比载流子扩展层技术更小。     

Low‐Noise Fully Differential Amplifiers Using JFET‐CMOS Integration Technology for Smart Sensors

In this paper, CMOS‐based low‐noise amplifiers with JFET‐CMOS technology for high‐resolution sensor interface circuits are presented. A differential difference amplifier (DDA) configuration is employed to realize differential signal amplification with very high input impedance, which is required for the front‐end circuit in many sensor applications. Low‐noise JFET devices are used as input pair of the input differential stages or source‐grounded output load devices, which are dominant in the total noise floor of DDA circuits. A fully differential amplifier circuit with pure CMOS DDA and three types of JFET‐CMOS DDAs were fabricated and their noise performances were compared. The results show that the total noise floor of the JFET‐CMOS amplifier was much lower compared to that of the pure CMOS configuration. The noise‐reduction effect of JFET replacement depends on the circuit configuration. The noise reduction effect by JFET device was maximum of about − 18 dB at 2.5 Hz. JFET‐CMOS technology is very effective in improving the signal‐to‐noise ratio (SNR) of a sensor interface circuit with CMOS‐based sensing systems. © 2008 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.