Analytical modeling of Junctionless Accumulation Mode Cylindrical Surrounding Gate MOSFET (JAM‐CSG)

This paper presents physics based analytical model for center potential, electric field and subthreshold drain current of Junctionless Accumulation Mode Cylindrical Surrounding Gate MOSFET (JAM‐CSG). The expressions are derived from Poisson's equation in cylindrical co‐ordinate system based on parabolic potential approximation (PPA). The influence of technology parameter variations such as gate length, silicon pillar diameter and oxide thickness on electrical characteristics is studied in detail. Developed analytical model results are validated through the good agreement with simulated data obtained from ATLAS 3D simulator. Copyright © 2016 John Wiley & Sons, Ltd.     

一种新型的OBS网络单向资源预留方法

光突发交换(OBS)是实现IP/DWDM网络的一种极有前途的方案。该文着重讨论了光空发交换(OBS)网络中单向资源预留的方式。文中首先介绍了著名的JET(Just Enough Time),提出了一种新的单项资源预留方式 Just Little Time (JLT),它不但能使用偏转路由,还能有效利用Fiter Detag Line（FDL）延时来弥补偏移时间的不足,只需使用很小的初始偏移时间,降低了数据在网络中的延时。随后,文章讨论了使用偏移时间增量来实现区分服务的方法。计算机仿真结果证明了所提方法的有效性。     

Improved performance of nanoscale junctionless transistor based on gate engineering approach

In this paper, we propose an effective method to improve the electrical characteristics of dual-material-gate (DMG) junctionless transistor (JLT) based on gate engineering approach, with the example of n-type double gate (DG) JLT with total channel length down to 30 nm. The characteristics are demonstrated and compared with conventional DMG DGJLT and single-material gate (SMG) DGJLT. The results show that the novel DMG DGJLT presents superior subthreshold swing (SS), drain-induced barrier lowering (DIBL), transconductance (G_m), ON/OFF current ratio, and intrinsic delay (τ). Moreover, these unique features can be controlled by engineering the length and workfunction of the gate material. In addition, the sensitivities of the novel DMG device with respect to structural parameters are investigated.     

Reduction of self-heating effect using selective buried oxide (SELBOX) charge plasma based junctionless transistor

A junctionless transistor (JLT) having high doping concentration of the channel, suffers from the threshold voltage roll-off because of random dopant fluctuation (RDF) effect. RDF has been minimized by using charge plasma based JLT. Charge plasma is same as a workfunction engineering in which work function of the electrode is varied to create hole/electron plasma and induce doping in the intrinsic silicon. N-type doping is induced at the source and drain side due to difference of workfunction of silicon wafer. In this paper, charge plasma based junctionless MOSFET on selective buried oxide (SELBOX-CPJLT) is proposed. This approach is used to reduce the self-heating effect presented in SOI-based devices. The proposed device shows better thermal efficiency as compared to SELBOX-JLT. 2D-Atlas simulation revealed the electrostatics and analog performance of both the devices. The SELBOX-CPJLT exhibits better electrostatic performance as compared to SELBOX-JLT for the same channel length. The analog performance such as intrinsic gain, transconductance generation factor, output conductance and unity gain cut-off frequency are extracted from small signal ac analysis at 1 MHz and compared to SELBOX-JLT. The analysis of the thermal circuit model of SELBOX structure is also performed.