Comparative studies of normally-off Al0.26Ga0.74N/AlN/GaN/Si high electron mobility transistors with different gate structures

Systematic designs to achieve normally-off operation and improved device performance for Al_0.26Ga_0.74N/AlN/GaN high electron mobility transistors (HEMTs) grown on a Si substrate are investigated in this work. The step-by-step approach includes: (1) devising a thin AlGaN/AlN composite barrier, (2) introducing fluoride ions within the active region by using CF₄ plasma treatment, (3) growing the Al₂O₃ oxide passivation layers within gate-drain/source regions by using a cost-effective ozone water oxidization technique, and (4) integrating a metal-oxide-semiconductor gate (MOS-gate) design with high-k Al₂O₃ gate dielectric. Devices with four different evolutionary gate structures have been compared and studied. Variations of threshold voltage (V_th), Hooge coefficients (α_H), maximum drain-source current density (I_{DS, max}), maximum extrinsic transconductance (g_{m, max}), gate-voltage swing (GVS) linearity, two-terminal gate-drain breakdown/turn-on voltages (BV_GD/V_on), on/off current ratio (I_on/I_off), and high-temperature characteristics up to 450 K are also investigated.     

Explanation of threshold voltage scaling in enhancement-mode InAlN/AlN-GaN metal oxide semiconductor high electron mobility transistors on Si substrates

We present enhancement-mode GaN high electron mobility transistors on Si substrates with ZrO₂ gate dielectrics of thicknesses t_ox between 10 and 24 nm. The oxide interlayers between the InAlN/AlN barrier and gate metal allow raising the device threshold voltage up to + 2.3 V and reduce gate leakage current to less than 100 nA/mm with a high drain current on/off ratio of 4 orders of magnitude. We use a model that explains the observed linear dependence of the threshold voltage on t_ox and allows determining fixed charges at the oxide/barrier interface.     

Normally-off characteristics of LiNbO3/AlGaN/GaN ferroelectric field-effect transistor

With the help of MgO mask layer, LiNbO₃ (LN) ferroelectric films were etched effectively using wet etching method and LN/AlGaN/GaN ferroelectric field-effect transistors (FFETs) were fabricated. The electrical properties of the FFETs were studied. Due to the ferroelectric polarization nature of LN films, normally-off characteristics with a turn-on voltage of about + 1.0 V were exhibited in the device. The operation mechanisms of the LN/AlGaN/GaN FFET devices were proposed by the numerical calculations of the electronic band structure and charge distribution.     

Normally-off trench JFET technology in 4H silicon carbide

A double gate normally-off silicon carbide (SiC) trench junction field effect transistors (JFET) design is considered. Innovative migration enhanced embedded epitaxial (ME³) growth process was developed to replace the implantation process and realize high device performance. Strong anisotropic behavior in electrical characteristics of the pn junction fabricated on (1 1 −2 0) and (1 −1 0 0) trench a-planes was observed, although quality of the pn diodes was found to be independent of trench plane orientations. Fabricated normally-off trench 4H-SiC JFET demonstrates the potential for lower specific on-resistance (R_onS) in the range of 5-10 mΩ cm² (1200 V class). A relative high T^−2.6 dependence of R_onS is observed. A breakdown voltage of 400 V in the avalanche mode was confirmed at zero gate bias conditions for cell design without edge termination. It was demonstrated that the normally-off JFETs are suitable for high temperature applications. Average temperature coefficient of threshold voltage (V_th) was calculated as −1.8 mV/°C, which is close to the MOS based Si power devices.     

RRAM-based FPGA for “Normally Off,Instantly On” applications

“Normally Off, Instantly On” applications are becoming common in our environment. They range from healthcare to video surveillance. As the number of applications and their associated performance requirements grow rapidly, more and more powerful, flexible, and power efficient computing units are necessary. In such a context, Field Programmable Gate Arrays (FPGA) architectures present a good trade-off between performance and flexibility. However, they consume high static power and can hardly be associated with power-gating techniques due to their long context-restoring phase. In this paper, we propose to integrate non-volatile resistive memories in the configuration cells and registers in order to instantly restore the FPGA context. If the circuit is in the ‘ON’ state for less than 42% of time, non-volatile FPGA starts saving energy compared to classical FPGA. Finally, when context-saving functionality is included, for a typical application with only 1% of time spent in the ‘ON’ state, the energy gain exceeds 40%.     

Performance enhancement of GaN SB-MOSFET on Si substrate using two-step growth method

We have grown high quality GaN layers on (1 1 1)-oriented silicon substrate using a two-step growth method and fabricated high-performance normally-off n-channel GaN Schottky-barrier MOSFET (SB-MOSFET). Indium-tin-oxide (ITO) was used as Schottky-barrier contact for source and drain (S/D) because the work function of ITO is close to the electron affinity of GaN. Due to enhanced crystalline quality and reduced surface roughness of GaN layer grown by two-step process, the fabricated device exhibited much improved performances: sufficiently high threshold voltage of 3.75 V, subthreshold slope of 171 mV/dec, low specific on-resistance of 9.98 mΩ cm², and very high field-effect mobility of 271 cm²/V s. This is the highest mobility value among the GaN MOSFETs ever reported so far.     

SiC junction-controlled transistors

The significant progress made over the past few years placed Silicon Carbide (SiC) power devices in a position to competitively challenge the existing standard Si solutions. This paper reviews the current trends regarding SiC junction-controlled devices and discusses the different approaches one may decide on when considering SiC junction field effect transistors (JFETs) for high power, high temperature applications.     

模拟研究常闭和常开工作模式下的平面栅极型碳纳米管场发射电子源

采用数值模拟的方法对比性地研究了常闭和常开工作模式下平面栅极型碳纳米管场发射电子源.静电场的数值计算结果显示:常闭工作模式下该电子源中阴极电极的表面电场分布不均匀,边缘处的高电场易导致其上的碳纳米管烧毁,从而引起场发射电流衰减.为了解决此问题,提出将常开工作模式用于该电子源,并证实常开工作模式能够用于该电子源,并有利于解决电流衰减问题.因此,相对于常闭工作模式,常开工作模式更适合平面栅极型碳纳米管场发射电子源.     

Normally-off AlGaN/AlN/GaN/Si oxide-passivated HEMTs and MOS-HEMTs by using CF4 plasma and ozone water oxidization treatment

The letter reports normally-off device characteristics of Al_0.26Ga_0.74N/AlN/GaN oxide-passivated high electron mobility transistors (HEMTs) and metal-oxide-semiconductor HEMTs (MOS-HEMTs) grown on a Si substrate. Al₂O₃ was formed as the surface passivation oxide or gate dielectric on a thin AlGaN barrier layer by using a cost-effective ozone water oxidization technique. CF₄ plasma was used to enable normally-off operation. For the gate dimensions of 1×100 µm², the present oxide-passivated HEMT and MOS-HEMT (a control Schottky-gate HEMT) have demonstrated superior on/off-current ratio (I_on/I_off) of 2.5×10⁶ and 1×10⁷ (3.9×10³), maximum extrinsic transconductance (g_{m, max}) of 154 and 175 (120) mS/mm, maximum drain-source current density (I_{DS, max}) of 312 and 349 (300) mA/mm, two-terminal gate-drain breakdown voltage (BV_GD) of −80 and −140 (−36) V, turn-on voltage (V_on) of 1.2 and 1.3 (1) V, and three-terminal on-state breakdown voltage (BV_DS) of 93 and 109 (48) V. Excellent BV_GD and BV_DS enhancements of 122% (288%) and 94% (127%) are achieved in the present oxide-passivated HEMT (MOS-HEMT) design.     

Oxide interfacial charge engineering towards normally-off AlN/GaN MOSHEMT

In this paper a detail insight into the role of oxide/barrier interfacial charges (N_ox) for shifting the threshold voltage (V_T) of AlN/GaN metal oxide semiconductor high electron mobility transistors (MOSHEMTs) is gained. A model is developed for V_T considering all possible charges arise at different interfaces. To validate the model the proposed device is simulated by considering different insulators and N_ox into account. It is very fascinating to observe that V_T is highly sensitive towards change in N_ox at higher oxide dimensions, whereas at lower dimensions N_ox has very negligible effect. Normally-off operation can be achieved by increasing or decreasing N_ox in MOSHEMT with Al₂O₃ or HfO₂ as gate dielectric respectively.