降低射频电路串扰噪声的布线方法

研究并解决了无障碍多层无网格射频电路的布线问题,主要包括三个部分:设计规则、串扰噪声限制和布线方法.首先通过设计规则计算连线参数,运用RLc模型估算串扰噪声,然后,按照需要连接的实节点个数进行归类并提出相应的布线算法.实验结果表明,该布线方法可有效地降低射频电路的串扰噪声.     

内嵌射频IC卡式PDA及其应用

将射频IC卡读写器内嵌入PDA之中，开发出内嵌射频IC卡式PDA，可作为便携式POS机使用．在PDA中嵌入桑夏2000操作系统后，以Borland C Builder为开发语言，开发出管理新型内嵌射频IC卡式PDA的应用系统．     

低压中和化CMOS差分低噪声放大器设计

以设计低电压LNA电路为目的,提出了一种采用关态MOSFET中和共源放大器输入级栅漏寄生电容Cgd的CMOS差分低噪声放大器结构.基于该技术,采用0.35μmCMOS工艺设计了一种工作在5.8GHz的低噪声放大器.结果表明,在考虑了各种寄生效应的情况下,该低噪声放大器可以在0.75V的电源电压下工作,其功耗仅为2.45mW.在5.8GHz工作频率下:该放大器的噪声系数为2.9dB,正向增益S21为5.8dB,反向隔离度S12为-30dB,S11为-13.5dB.     

领先的RFIC低成本测试方案

主流RFIC的高频率，高带宽，多射频端口的特点对现在的RFATE系统构成了不小的挑战，以模块化架构为基础的RFATE架构凭借丰富的射频端口资源、高效的并行测试构架、人性化的操作界面，以及先进的测试板为复杂RFIC提供了低成本测试解决方案。     

基于射频卡与校园网的学生实验签到系统

在分析现有高校实验管理方式基础上，从提高实验教学质量的角度出发，结合教学实践，介绍了一种基于非接触式IC卡的实验签到系统的设计方案、系统组成、主要功能以及该系统的硬件和软件部分的具体实现技术。     

Alternative approach to low‐noise amplifier design for ultra‐wideband applications

Conventional ultra‐wideband low‐noise amplifiers require a flat gain over the entire 3.1–10.6 GHz bandwidth, which severely restraints the trade‐off spaces in low noise amplifier design. This article proposes a relaxed gain‐flatness requirement based on system level investigations. Considering the wireless transceiver front‐end with antenna and propagation channel, the unflat‐gain low‐noise amplifier with an incremental gain characteristic does not degrade the performance of overall system. As an alternative to its flat‐gain counterpart, the proposed unflat gain requirement tolerates gain ripple as large as 10 dB, which greatly eases the design challenges to low‐noise amplifier for ultra‐wideband wireless receivers. Two low‐noise amplifier examples are given to demonstrate the feasibility and design flexibility under the proposed gain‐flatness requirement. © 2007 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2007.     

高集成度RFIC提升4G LTE基站容量和速度

随着全球移动运营商向4G技术演进,需要具有小外形尺寸的更高密度射频卡,以支持提供连续语音和高数据速率服务。特别是手机用户数与全球无线基础设施建设的快速增长,这就要求基站必须提升数据流容量(蜂窝容量)和速度,因此对射频电路的集成化以及成本都提出了更高的要求。     

应用于无线传感器网络的低噪声放大器设计

给出一种基于SMIC0.13μm RFCMOS工艺、应用于无线传感器网络2.4GHz的低噪声放大器设计。设计目标为在2.43GHz的中心频率下带宽为120MHz,并且增益分为高20dB、中10dB及低0dB三档可调。电路采用功率和噪声优化技术,输入端采用片外电感匹配,输入输出都匹配到50Ω阻抗。在Cadence Spectre仿真环境下的后仿真结果表明:高增益时S21为21.2dB而噪声系数为0.5dB,S11为-29.8dB,S22为-20.7dB。电路在1.2V电源电压下的工作电流约为6mA。     

Integrated Inductors Modeling for Library Development and Layout Generation

In this work we propose a modification to the conventional lumped equivalent circuit model for integrated inductors. Also the widely used parametric model is modified. The proposed models expand the frequency range where the integrated inductor behavior is accurately predicted. They are useful in developing automatic tools to assist the designers in selecting and automatically laying-out integrated inductors [1]. This work is based on measurements from integrated inductors fabricated in a standard silicon process.     

Characterization of on-chip balun with patterned floating shield in 65 nm CMOS

A simple method of balun synthesis is proposed to estimate the balun structure in the operating frequency band.Then,a careful optimization is implemented to evaluate the estimated structure by a series of EM simulations. In order to investigate the impact of the patterned floating shield(PFS),the optimized baluns with and without PFS are fabricated in a 65 nm 1P6M CMOS process.The measurement results demonstrate that the PFS obviously improves the insertion loss(IL) in the frequency range and a linear improving trend appears smoothly.It is also found that the PFS gradually improves the phase balance as the frequency increases,while it has a very slight influence on the magnitude balance.To characterize the device’s intrinsic power transfer ability,we propose a method to obtain the baluns’ maximum available gain directly from the measured 3-port S-parameters and find that IL-comparison may not be very objective when evaluating the shielding effect.We also use the resistive coupling efficiency to characterize the shielding effect,and an imbalanced shielding efficiency is found though the PFS is perfectly symmetric in the measurement.It can be demonstrated that this phenomenon comes from the intrinsic imbalance of our balun layout.