基于小波包的多载波调制系统的峰均比分析与消减

介绍了以小波包函数为载波的多载波调制系统,分析了WPM信号符号周期内峰值功率的互补累积分布函数(CCDF)及其对PAPR性能的有效描述;并对不同小波滤波器组的PAPR性能进行了比较,提出了一种能有效减小WPM系统的峰均比的压缩扩展算法。仿真实验证明了该算法的有效性和可行性。     

降低OFDM信号峰均比融合方法的研究

针对正交频分复用(OFDM)信号峰均比(PAPR)高的问题,提出了一种降低PAPR的融合算法,通过在发射端对OFDM信号进行两次降低PAPR处理来降低系统的峰均比.仿真结果表明,该算法可以大幅度的降低OFDM信号的PAPR.     

Design of Sinh‐Domain filters using complementary operators

A new systematic method for designing Sinh‐Domain filters is introduced in this paper. This is achieved by employing an appropriate set of complementary operators, in order to transpose the conventional functional block diagram representation of each linear operation to the corresponding one into the Sinh‐Domain. The proposed method offers the benefits of facilitating the design procedure of high‐order Sinh‐Domain filters and of the absence of any restriction concerning the type and/or the order of the realized filter function. As an example, a third‐order Sinh‐Domain leapfrog filter is designed by employing the proposed set of operators. Two possible realizations are given and their performance has been evaluated and compared through simulation results. Copyright © 2011 John Wiley & Sons, Ltd.     

一种抑制OFDM系统峰均功率比的融合算法

提出了一种抑制正交频分复用（OFDM）系统峰均功率比（PAPR）的融合算法,该算法在OFDM系统发射端对信号先后进行选择映射（SLM）和压扩变换,从而使信号的峰均比得到二次抑制。仿真结果说明了该算法对峰均比的抑制效果比单独使用SLM技术和压扩技术都有明显的改善,并且对于计算复杂度要求不高的OFDM系统,不同参数的综合技术可相互替代以提高系统的误码性能。     

A simulation study of high‐order CMOS hyperbolic‐sine filters

This paper advances the field of externally linear–internally nonlinear (ELIN) filters by introducing a synthesis method that enables the design of high‐order class‐AB sinh filters by means of complementary metal–oxide semiconductor (CMOS) weak‐inversion sinh integrators comprising only one type of devices in their translinear loops. The proposed transistor‐level synthesis approach is demonstrated through the examples of (1) a biquadratic and (2) a fifth‐order filter, and their simulated performance is studied. The biquadratic filter achieves a dynamic range of 94 dB and has a tunable quality factor Q up to the value of 8, whereas its natural frequency can be tuned for four orders of magnitude. Its static power consumption amounts to 6.2 μW for Q = 1 and f_o = 2 kHz. The fifth‐order Chebyshev sinh CMOS filter with a cut‐off frequency of 100 Hz, a pass band ripple of 1 dB, and a power consumption of ~300 nW is compared head‐to‐head with its pseudo‐differential class‐AB CMOS log domain counterpart. The sinh filter achieves similar or better signal‐to‐noise ratio (SNR) and signal‐to‐noise‐plus‐distortion ratio (SNDR) performances with half the capacitor area but at the expense of higher power consumption from the same power supply level. All three presented filter topologies are novel. Cadence design framework simulations have been performed using the commercially available 0.35 µm AMS (austriamicrosystems) process parameters. Copyright © 2013 John Wiley & Sons, Ltd.     

1.5 V square‐root domain universal biquad filters

Square‐root domain universal biquad topologies are introduced in this paper. One of them is single input multiple output, while the other one is multiple input single output biquad. Important benefits offered by the proposed topologies are the electronic adjustment of the resonant frequency and the capability for operating in a low‐voltage environment; also, the resonant frequency could be adjusted without disturbing the Q factor and vice‐versa. Simulation results using the Spectre simulator of the Analog Design Environment of Cadence software validate the correct operation of the proposed topologies and provide important performance characteristics. Copyright © 2011 John Wiley & Sons, Ltd.     

连续小波变换VLSI实现综述

小波变换是信号处理、图像压缩和模式识别等诸多领域中一个非常有效的数学分析工具。然而，实时小波变换计算量大，需要专用硬件来实现。连续小波变换的VLSI实现在处理速度、功耗及适用频率范围方面部具有较明显的优势，且实现方法灵活。本文对近年来有关该领域的研究情况作了综合评述，讨论了其中存在的问题，并指出了今后的若干发展方向，特别是瞬时缩展电路技术是实现低电压低功耗小波变换芯片的重要途经之一。     

0.5‐V fractional‐order companding filters

Novel configurations of fractional‐order filter topologies, realized through the employment of the concept of companding filtering, are introduced in this paper. As a first step, the design procedure is presented in a systematic algorithmic way, while in the next step, the basic building blocks of sinh‐domain and log‐domain integrators are presented. Because of the employment of metal–oxide–semiconductor (MOS) transistors operated in the subthreshold region, the derived filter structures offer the capability for operation in an ultra‐low‐voltage environment. In addition, because of the offered resistorless realizations, the proposed topologies are reconfigurable, in the sense that the order of the filter could be chosen through appropriate bias current sources. The performance of the derived fractional‐order filters has been evaluated through simulation and comparison results using the Analog Design Environment of the Cadence software and MOS transistor parameters provided by the Taiwan Semiconductor Manufacturing Company (TSMC) 180‐nm complementary MOS (CMOS) process. Copyright © 2014 John Wiley & Sons, Ltd.     

抑制LOFDM系统PAPR非线性压扩变换算法

针对网格正交频分复用(LOFDM,lattice OFDM)系统具有较传统OFDM系统更高峰均功率比(PAPR,peak-to-average power ratio)的问题,在将传统非线性压扩变换应用于LOFDM系统的同时研究并分析了一种新的基于原信号统计分布特性的连续可导非线性压扩算法。该算法从原信号的渐进高斯分布特性出发并对原信号的幅度分布函数进行截断逼近,在保持平均功率不变的条件下,将压扩后的信号限制在与原信号分布特性一致的特定范围内,使压扩后的信号在保持其原有分布特性的同时,能更大程度改善系统PAPR和误比特(BER,biterror ratio)性能。理论分析和仿真实验表明,所提出的算法性能要显著优于传统非线性压扩算法。     

A律PCM与音节压扩DM编码的变换

本文讨论了一种码变换器,它实现了 A 律 PCM 与音节压扩 DM(ADM)间的码型变换,该变换采用了一种特殊滤波器(多速率数字滤波器).讨论了变换过程和参数选择,并给出了性能模拟结果.