mc-Si:H/c-Si solar cell prepared by PECVD

Hetero-junction solar cells with an mc-Si:H window layer were achieved. The open voltage is increased while short current is decreased with increasing the mc-Si:H layer's thickness of emitter layer. The highest of V oc of 597 mV has obtained. When fixed the thickness of 30 nm, changing the N type from amorphous silicon layer to micro-crystalline layer, the efficiency of the hetero-junction solar cells is increased. Although the hydrogen etching before deposition enables the c-Si substrates to become rough by AFM images, it enhances the formation of epitaxial-like micro-crystalline silicon and better parameters of solar cell can be obtained by implying this process. The best result of efficiency is 13.86% with the V oc of 549.8 mV, J sc of 32.19 mA·cm-2 and the cell's area of 1cm2.     

Design and Simulation of a Light-Activated Darlington Transistor Based on a SiCGe/3C-SiC Hetero-Structure

针对抗电磁干扰的需要提出了一种由SiCGe/3C-SiC异质结构成的光控达林顿晶体管设计.用多维器件模拟软件ISE对这种新型功率开关进行了特性仿真.结果表明,与采用其他结晶类型的碳化硅衬底相比,SiCGe与3C-SiC间较小的晶格失配有利于提高器件性能,可使其最大共射极电流增益达到890,获得最好的光触发特性和较好的Ⅰ-Ⅴ特性,饱和压降大约为4V.     

CuPc based organic--inorganic hetero-junction with Au electrodes

In present work, a hetero-junction of n-silicon (n-Si) with copper phthalocyanine (CuPc) has been fabricated. The current-voltage characteristics were investigated to explain the rectification and conduction mechanism. The effect of temperature and humidity on electrical properties of n-Si/CuPc hetero-junction has also been investigated. The characteristics of the junction have been observed to be temperature and humidity dependent so it is suggested that this junction can be used as temperature and humidity sensor.     

CuPc based organic-inorganic hetero-junction with Au electrodes

A hetero-junction of n-silicon (n-Si) and copper phthalocyanine (CuPc) has been fabricated. The cur-rent-voltage characteristics were investigated to explain the rectification and conduction mechanism. The effect of temperature and humidity on the electrical properties of n-Si/CuPc hetero-junction has also been investigated. The characteristics of the junction have been observed to be temperature and humidity dependent, so it is suggested that this junction can be used as a temperature and humidity sensor.     

Organic photovoltaics using thin gold film as an alternative anode to indium tin oxide

Indium Tin Oxide (ITO) is the most commonly used anode as a transparent electrode and more recently as an anode for organic photovoltaics (OPVs). However, there are significant drawbacks in using ITO which include high material costs, mechanical instability including brittleness and poor electrical properties which limit its use in low-cost flexible devices. We present initial results of poly(3-hexylthiophene): phenyl-C₆₁-butyric acid methyl ester OPVs showing that an efficiency of 1.9% (short-circuit current 7.01 mA/cm², open-circuit voltage 0.55 V, fill factor 0.49) can be attained using an ultra thin film of gold coated glass as the device anode. The initial I-V characteristics demonstrate that using high work function metals when the thin film is kept ultra thin can be used as a replacement to ITO due to their greater stability and better morphological control.     

纳米硅/晶体硅异质结电池的暗I-V特性和输运机制

采用HWCVD技术在P型CZ晶体硅衬底上制备了纳米硅／晶体硅异质结太阳电池,测量了晶体硅表面在不同氢处理时间下的异质结的暗I-V特性和相应的电池性能参数．室温下的正向暗I-V特性采用双二极管模型来拟合,可将0～1V的电压范围区分为4个区域：旁路电阻（0～0．15V）、非理想二极管2（0．15～0．3V）、理想二极管1（0．3～0．5V）和串联电阻（〉0．5V）．拟合结果表明,适当的氖处理时间（～30s）可有效降低非理想二极管的理想因子n2,即降低界面复合电流,表明具有好的界面特性．对于282～335K的暗I—V温度特性的研究表明,在0．15～0．3V的低电压范围,暗电流主要由耗尽区的复合电流提供,0．3～0．5V电压范围,对输运起主要作用的是隧穿过程,该过程可用通过界面陷阱能级的隧穿模型来解释．     

Effect of CdSe/P3HT composition on electrical and structural properties of bulk hetero-junction solar cell active layer

The use of inorganic nano-semiconductor/polymer blend as the active layer for organic bulk hetero-junction solar cell is an alternative to change and improve the device characteristics and performance. Effects of CdSe/P₃HT composition in the blend and its loading amount in the solvent on the electrical and structural properties of active layers formed were investigated. The results of atomic force microscopy study indicated that the surface roughness of composite active layer could be controlled below 10 nm for the entire range of composite loading amount investigated in this study. The transmission line method experiments have demonstrated that the electrical percolation pathways could be developed at the critical loading amount of CdSe/P₃HT composite, resulting in the abrupt decrease of sheet resistance and significant increase in the power conversion efficiency of ITO/PEDOT:PSS/(CdSe/P₃HT)/Al solar cell.     

Improvement of CdSe/P3HT bulk hetero-junction solar cell performance due to ligand exchange from TOPO to pyridine

Cadmium selenide (CdSe) nanoparticles of 2–7 nm diameter were synthesized by a hot injection method and their TOPO ligands exchanged with pyridine by a liquid–liquid extraction process. The effects of the ligand exchange on the material properties of the nanoparticles and device performance of the bulk hetero-junction (BHJ) solar cell were systematically investigated. The wavelength shift to a shorter value observed in the PL spectra of the pyridine-capped CdSe indicates that the size of nanoparticles decreased due to the exchange of the surface ligands of the CdSe from TOPO to pyridine. Improvements in the power conversion efficiency of BHJ solar cells made with pyridine-capped CdSe are mainly attributed to the enhanced current collection, J_sc=0.43 mA/cm² (TOPO) to 1.4 mA/cm² (pyridine).     

基于能带调制模型的高压增强型AlGaN/GaN HFET器件

提出了一种能带调制模型,通过在异质结界面处引入负离子电荷(如氟离子)调制异质结处的局部能带分布,实现了对异质结界面处的高密度2DEG的改变。基于能带调制模型,提出了一种复合调制沟道AlGaN/GaNHFET器件。通过在增强型沟道调制区和RESURF调制区分别引入不同剂量的负离子,不仅实现了增强型器件,而且可以降低尖峰电场,优化异质结电场分布,提高器件击穿电压。通过器件仿真软件对其器件工作原理进行了模拟分析,并通过实验结果表明,其器件品质因子FOM由传统器件的4.8MW.cm-2提高到26.7MW.cm-2。     

InP 双异质结晶体管工艺ROM-Less 架构14 GHz DDS

介绍了采用ft/fmax 为250/280 GHz 的0.7μm InP 双异质结晶体管工艺的14 GHz 8bit ROM-Less 直接数字频率合成器。电路采用正弦加权非线性数模转换器实现了一种ROM-Less 相幅转换,充分发挥了InP-DHBT 技术在中大规模混合信号集成电路中的速度优势。为降低功耗,采用了简化的流水线相位累加器。在整个频率控制字范围内,测试得到的平均无杂散动态范围为24.8 dBc。该电路由2122 个晶体管组成,功耗为2.4 W,其优值系数为5.83 GHz/ W。