Good dielectric performance and broadband dielectric polarization in Ag,Nb co-doped TiO2

Due to the demand of miniaturization and integration for ceramic capacitors in electronic components market, TiO₂-based ceramics with colossal permittivity has become a research hotspot in recent years. In this work, we report that Ag⁺/Nb⁵⁺ co-doped (Ag_1/4Nb_3/4)_xTi_1−xO₂ (ANTOx) ceramics with colossal permittivity over a wide frequency and temperature range were successfully prepared by a traditional solid–state method. Notably, compositions of ANTO0.005 and ANTO0.01 respectively exhibit both low dielectric loss (0.040 and 0.050 at 1 kHz), high dielectric permittivity (9.2 × 10³ and 1.6 × 10⁴ at 1 kHz), and good thermal stability, which satisfy the requirements for the temperature range of application of X9R and X8R ceramic capacitors, respectively. The origin of the dielectric behavior was attributed to five dielectric relaxation phenomena, i.e., localized carriers' hopping, electron–pinned defect–dipoles, interfacial polarization, and oxygen vacancies ionization and diffusion, as suggested by dielectric temperature spectra and valence state analysis via XPS; wherein, electron-pinned defect–dipoles and internal barrier layer capacitance are believed to be the main causes for the giant dielectric permittivity in ANTOx ceramics.     

Nitrogen-doped hierarchically porous carbon obtained via single step method for high performance supercapacitors

In the present work, nitrogen doped hierarchically activated porous carbon (APC) samples have been synthesized via single step scalable method using ethylene di-amine tetra acetic acid (EDTA) as precursor and KOH as activating agent. Activated porous carbons with different pore sizes have been developed by varying the activation temperature. SEM, TEM and SAXS analysis suggest that with variation of activation temperature, a hierarchical porous structure with interconnected meso-pore and micro pores has been achieved. The sufficiently high surface area of the synthesized materials provides active sites to enhance the diffusion of ions between the electrolyte and the carbon electrodes. The electrode prepared at 800 °C activated sample exhibited highest specific capacitance of 274 Fg^-1 in two electrode setup, at a current density of 0.1 Ag^-1 in 1 M aqueous H₂SO₄. Along with this, it showed maximum energy density of 9.5 Whkg^?1 at a power density of 64.5 Wkg^-1. The remarkable electrochemical performance reveals that the synthesized nitrogen doped activated carbon electrodes derived from EDTA can be tuned to have optimum pore structure and pore size distribution for better electrochemical performance, so it can be considered as a potential electrode material for applications in electrochemical energy storage.     

Modeling the effect of deep traps on the capacitance–voltage characteristics of p-type Si-doped GaAs Schottky diodes grown on high index GaAs substrates

Numerical simulation, using SILVACO-TCAD, is carried out to explain experimentally observed effects of different types of deep levels on the capacitance–voltage characteristics of p-type Si-doped GaAs Schottky diodes grown on high index GaAs substrates. Two diodes were grown on (311)A and (211)A oriented GaAs substrates using Molecular Beam Epitaxy (MBE). Although, deep levels were observed in both structures, the measured capacitance–voltage characteristics show a negative differential capacitance (NDC) for the (311)A diodes, while the (211)A devices display a usual behaviour. The NDC is related to the nature and spatial distribution of the deep levels, which are characterized by the Deep Level Transient Spectroscopy (DLTS) technique. In the (311)A structure only majority deep levels (hole traps) were observed while both majority and minority deep levels were present in the (211)A diodes. The simulation, which calculates the capacitance–voltage characteristics in the absence and presence of different types of deep levels, agrees well with the experimentally observed behaviour.     

新型的芯片间互连用CMOS/BiCMOS驱动器

从改善不同类型 IC芯片之间的电平匹配和驱动能力出发 ,设计了几例芯片间接口 (互连 )用 CMOS/Bi CMOS驱动电路 ,并提出了采用 0 .5 μm Bi CMOS工艺 ,制备所设计驱动器的技术要点和元器件参数。实验结果表明所设计驱动器既具有双极型电路快速、大电流驱动能力的特点 ,又具备 CMOS电路低压、低功耗的长处 ,因而它们特别适用于低电源电压、低功耗高速数字通信电路和信息处理系统。     

超高压大容量铝电解电容器的研制

分析了大功率设备用超高压大容量铝电解电容器的特点,通过研制工作电解液、制订制作工艺及零部件设计方案,研制出的超高压大容量铝电解电容器具有损耗角正切小(tgδ为0.25)、承受纹波电流能力强(100 Hz,2.12～27.8 A)及寿命长的特点,耐久性达到85℃,5 000 h。     

新型毫米波微带带通滤波器

介绍了一种新型的加载电容型毫米波微带带通滤波器。对这种滤波器进行了分析,推导出了滤波器中所用谐振单元间的耦合系数。该滤波器通过加载电容而出现慢波效应,使得在不改变电路性能的情况下,减小了电路尺寸。同时由于电路中加载电容形成的慢波效应而出现了带阻效应,因此对谐波有很好的抑制作用。利用高频分析软件CST仿真分析并设计了这种新型的加载电容型毫米波微带带通滤波器,实验结果与设计曲线结果相符。     

Signal Integrity: Fault Modeling and Testing in High-Speed SoCs

As we approach 100 nm technology the interconnect issues are becoming one of the main concerns in the testing of gigahertz system-on-chips. Voltage distortion (noise) and delay violations (skew) contribute to the signal integrity loss and ultimately functional error, performance degradation and reliability problems. In this paper, we first define a model for integrity faults on the high-speed interconnects. Then, we present a BIST-based test methodology that includes two special cells to detect and measure noise and skew occurring on the interconnects of the gigahertz system-on-chips. Using an inexpensive test architecture the integrity information accumulated by these special cells can be scanned out for final test and reliability analysis.     

基于充放电原理实现的微电容测量电路

具有抗分布电容以及简单实用等特性的充放电电路是目前微电容测量中广泛采用的一种测量电路。本文对基于充放电原理的微电容测量电路进行了深入研究，并介绍一种基于充放电原理的实用电路。     

A novel compact circuit for 4-PAM energy-efficient high speed interconnect data transmission and reception

Transmission of signals, whether on-chip or off-chip, places severe constraints on timing and extracts a large price in energy. New silicon device technologies, such as back-plane CMOS, provide a programmable and adaptable threshold voltage as an additional tool that can be used for low power design. We show that one particularly desirable use of this freedom is energy-efficient high-speed transmission across long interconnects using multi-valued encoding. Our multi-valued CMOS circuits take advantage of the threshold voltage control of the transistors, by using the signal-voltage-to-threshold-voltage span, in order to make area-efficient implementations of 4-PAM (pulse amplitude modulation) transceivers operating at high speed. In a comparison of a variety of published technologies, for signal transmission with interconnects of 10-15 mm length, we show up to 50% improvement in energy for on-chip signal transmission over binary encoding together with higher limits for operating speeds without a penalty in circuit noise margin.     

电容传感器在使用中存在的几个问题及处理方法

随着电容测量技术的迅速发展，电容传感器在非电量测量和自动检测中得到广泛应用，但它在使用过程中也存在一些问题，针对在使用电容传感器过程中存在的几个问题，从电容传感器的原理和工作过程两个方面进行了讨论，并提出行之有效的处理方法。