2.3–21 GHz broadband and high linearity distributed low noise amplifier

This paper focuses on the design of a 2.3–21 GHz Distributed Low Noise Amplifier (LNA) with low noise figure (NF), high gain (S₂₁), and high linearity (IIP3) for broadband applications. This distributed amplifier (DA) includes S/C/X/Ku/K-band, which makes it very suitable for heterodyne receivers. The proposed DA uses a 0.18 μm GaAs pHEMT process (OMMIC ED02AH) in cascade architecture with lines adaptation and equalization of phase velocity techniques, to absorb their parasitic capacitances into the gate and drain transmission lines in order to achieve wide bandwidth and to enhance gain and linearity. The proposed broadband DA achieved an excellent gain in the flatness of 13.5 ± 0.2 dB, a low noise figure of 3.44 ± 1.12 dB, and a small group delay variation of ±19.721 ps over the range of 2.3–21 GHz. The input and output reflection coefficients S₁₁ and S₂₂ are less than −10 dB. The input compression point (P_1dB) and input third-order intercept point (IIP3) are −1.5 dBm and 11.5 dBm, respectively at 13 GHz. The dissipated power is 282 mW and the core layout size is 2.2 × 0.8 mm².     

A novel open-loop high-speed CMOS sample-and-hold

A new open-loop high-speed CMOS sample-and-hold is presented. Based on new method for further reduction of voltage-dependent charge injection, a new CMOS sample-and-hold was designed. Simulation results confirm the effectiveness of this method. Over 10 dB improvement in signal-to-noise ratio, compared to the signal-to-noise ratio of conventional bottom plate sampling S/Hs was achieved with this method. A comparison between newly designed S/H and the bottom-plate sampling S/H is presented.     

Algebraic nonlinearity and its applications to cryptography

The algebraic nonlinearity of an n-bit boolean function is defined as the degree of the polynomial f(X) Z ₂[x ₁, x ₂,..., x _n] that represents f. We prove that the average degree of an ANF polynomial for an n-bit function is n+o(1). Further, for a balanced n-bit function, any subfunction obtained by holding less than n-[log n]- 1 bits constant is also expected to be nonaffine. A function is partially linear if f(X) has some indeterminates that only occur in terms bounded by degree 1. Boolean functions which can be mapped to partially linear functions via a linear transformation are said to have a linear structure, and are a potentially weak class of functions for cryptography. We prove that the number of n-bit functions that have a linear structure is asymptotic .The author is presently employed by the Distributed System Technology Center, Brisbane, Australia.Project sponsored in part by NSERC operating Grant OGP0121648, and the National Security Agency under Grant Number MDA904-91-H-0012. The United States Government is authorized to reproduce and distribute reprints notwithstanding any copyright notation hereon.     

电荷灵敏放大器及QDC线性研究

北京正负电子对撞机试验束粒子描迹仪系统采用多丝正比室（MWPC）做探测器，粒子信号经电荷灵敏放大器放大，经电荷积分ADC数字化。本文讨论了电荷灵敏放大器的原理及系统的线性，给出了放大器线性度软件仿真结果、电荷积分ADC的性能测量结果及数据采集系统的线性测量结果。     

纳米样板的制备及其精度分析

介绍了纳米样板的研究现状及制备工艺，特别对扫描探针显微镜(SPM)表面局域氧化反应工艺进行了详述；分析了原子力显微镜(AFM)探针诱导局域氧化工艺的原理及其影响参数，原理为高度局域化的电化学反应，影响参数包括探针上所施加的电压、扫描速度、探针曲率半径、相对湿度以及氧化物厚度等；用该方法分别制备了5条栅线和7条栅线的一维纳米结构样板，并对7条栅线的纳米结构样板的精度和不确定度影响因素进行了分析。     

基于线性输入输出关系的空间连杆机构设计

通过对机构设计要求和初始条件的分析,提出两种典型的设计方案,一种是RSSR机构,另一种是双RSSR机构。以CATIA为平台,按自顶向下的设计思路,进行空间连杆机构的结构设计,并在CATIA运动模拟机构中进行运动模拟,比较了两种方案的运动传递特性。分析指出,在输入角度较小的情况下,两种机构的输入量与输出量之间均能保持良好的线性关系;适当选择构件尺寸,双RSSR机构能基本保持输出与输入相等。而RSSR机构能否保持输出与输入相等主要受到初始条件的限制。     

A UWB CMOS low-noise amplifier with noise reduction and linearity improvement techniques

In this paper, a highly linear CMOS low noise amplifier (LNA) for ultra-wideband applications is presented. The proposed LNA improves both input second- and third-order intercept points (IIP2 and IIP3) by canceling the common-mode part of all intermodulation components from the output current. The proposed LNA structure creates equal common-mode currents with the opposite sign by cascading two differential pairs with a cross-connected output. These currents eliminate each other at the output and improve the linearity. Also, the proposed LNA improves the noise performance by canceling the thermal noise of the input and auxiliary transistors at the output. Detailed analysis is provided to show the effectiveness of the proposed LNA structure. Post-layout circuit level simulation results using a 90 nm RF CMOS process with Spectre-RF reveal 9.5 dB power gain, -3 dB bandwidth (BW_−3dB) of 8 GHz from 2.4 GHz to 10.4 GHz, and mean IIP3 and IIP2 of +13.1 dBm and +42.8 dBm, respectively. The simulated S₁₁ is less than −11 dB in whole frequency range while the LNA consumes 14.8 mW from a single 1.2 V power supply.     

用遗传算法精确求解平面直线度误差

本文采用一种新的方法计算满足最小区域活的平面直线度误差──遗传算法,并采用实数值编码,其计算结果的精确度非常高,理论上可以无限逼近真实值。该算法简单明了,收敛速度快,在计算机上容易实现。     

过程控制中传感器静态性能指标的标准化研究

本文从标准化研究工作角度对目前过程控制中传感器重复性和线性度及总精度指标的确定中比较常见的几种方法进行了情况分析,指出从标准的角度提高过程控制中传感器重复性和线性度及总精度性能指标的科学合理的措施,进一步说明了标准的重要性。