Superhydrophobicity vs. Ice Adhesion: The Quandary of Robust Icephobic Surface Design

The mesoscale, multitier texture of the lotus leaf has served as an inspiration to fabricate surface designs with controllable superhydrophobic properties, targeting a broad range of applications. The choice of material for such designs is directly related to surface performance, in particular under adverse and realistic conditions. Due to its importance in many applications, here aluminium is employed as a material platform and identify key porous hierarchical textures, yielding extraordinary impalement‐resistant behavior: Droplet repellency is demonstrated consistently for water impact velocities up to 12 m s⁻¹ (extreme Weber number, We ≈ 3500). Despite impressive superhydrophobic behavior, if ice forms on such surfaces, ice adhesion is markedly stronger than on less hydrophobic alumina nanotube array structures. In a departure from the findings of the well‐accepted shear stress‐based ice adhesion criterion, a deviation between decreasing ice adhesion strength and increasing hydrophobicity is observed. This is explained with ice adhesion mechanism, depending strongly on the applied stress field orientation and the respective effective ice–substrate contact area. Our results indicate that ice adhesion criteria for the performance of icephobic surfaces should account for the simultaneous presence of shear and tensile stresses, instead of shear stresses alone.     

Switchable Polar Nanotexture in Nanolaminates HfO2-ZrO2 for Ultrafast Logic-in-Memory Operations

Nontrivial topological polar textures in ferroelectric materials, including vortices, skyrmions, and others, have the potential to develop ultrafast, high-density, reliable multilevel memory storage and conceptually innovative processing units, even beyond the limit of binary storage of 180° aligned polar materials. However, the realization of switchable polar textures at room temperature in ferroelectric materials integrated directly into silicon using a straightforward large area fabrication technique and effectively utilizing it to design multilevel programable memory and processing units has not yet been demonstrated. Here, utilizing vector piezoresponse force and conductive atomic force microscopy, microscopic evidence of the electric field switchable polar nanotexture is provided at room temperature in HfO₂-ZrO₂ nanolaminates grown directly onto silicon using an atomic layer deposition technique. Additionally, a two-terminal Au/nanolaminates/Si ferroelectric tunnel junction is designed, which shows ultrafast (≈83 ns) nonvolatile multilevel current switching with high on/off ratio (>10⁶), long-term durability (>4000 s), and giant tunnel electroresistance (10⁸%). Furthermore, 14 Boolean logic operations are tested utilizing a single device as a proof-of-concept for reconfigurable logic-in-memory processing. The results offer a potential approach to “processing with polar textures” and addressing the challenges of developing high-performance multilevel in-memory processing technology by virtue of its fundamentally distinct mechanism of operation.