2.3–21 GHz broadband and high linearity distributed low noise amplifier

This paper focuses on the design of a 2.3–21 GHz Distributed Low Noise Amplifier (LNA) with low noise figure (NF), high gain (S₂₁), and high linearity (IIP3) for broadband applications. This distributed amplifier (DA) includes S/C/X/Ku/K-band, which makes it very suitable for heterodyne receivers. The proposed DA uses a 0.18 μm GaAs pHEMT process (OMMIC ED02AH) in cascade architecture with lines adaptation and equalization of phase velocity techniques, to absorb their parasitic capacitances into the gate and drain transmission lines in order to achieve wide bandwidth and to enhance gain and linearity. The proposed broadband DA achieved an excellent gain in the flatness of 13.5 ± 0.2 dB, a low noise figure of 3.44 ± 1.12 dB, and a small group delay variation of ±19.721 ps over the range of 2.3–21 GHz. The input and output reflection coefficients S₁₁ and S₂₂ are less than −10 dB. The input compression point (P_1dB) and input third-order intercept point (IIP3) are −1.5 dBm and 11.5 dBm, respectively at 13 GHz. The dissipated power is 282 mW and the core layout size is 2.2 × 0.8 mm².     

Broadband bowtie belt nanoantennas

In this article, we study a linear array of bowtie nanoantennas placed between two metallic strips that can work from 800 to 1420 nm (600 nm linewidth), with an electric field enhancement factor close to 20. We study the dynamical change of the position of the electric field enhancement amongst different elements in the array and, at the same time, the effects of dispersion on the scalability of the array elements. A systematic analysis and methodology to produce an array that can operate over a large bandwidth whilst maintaining the electric field enhancement without significant variation is provided.     

电信宽带LAN接入网建设中的有关问题探讨

文章介绍了采用以太网技术的宽带接入网，对目前以及网宽带接入网建设中存在的问题如安全、维护、投资和计费等进行了研究，提出了解决上述问题的建议。     

宽带DDS跳频源设计

直接数字合成（DDS）简单可靠、控制方便，具有很高的频率分辨率，高速转换，非常适合快速跳频的要求。在对DDS基本原理进行了简要介绍和分析后，提出宽带跳频源设计方案。     

CMOS光接收机主放大器设计

利用CMOS工艺设计一种用于SDH STM 4速率级(622 Mb/s)光纤用户网的光接收机放大电路。此电路由输入/输出缓冲、主放大单元、偏置补偿电路4部分组成。通过直接耦合技术提高增益,降低功耗;利用有源电感负载提高系统带宽。采用商用SmartSpice电路仿真软件和CSMC HJ 0.6μm工艺参数对该电路进行仿真。结果表明,该电路在5 V工作电压下中频增益为81 dB,3 dB带宽为470 MHz。     

采用RF2607的WLAN自动增益控制设计

介绍了宽动态变化范围的新型可变增益放大器RF2607的特性、功能,给出了利用RF2607设计无线局域网(WLAN)通信中自动增益控制部分的实用电路.     

5Gb/s 0.25μm CMOS限幅放大器

采用TSMC 0.25μm CMOS技术设计实现了高速低功耗光纤通信用限幅放大器.该放大器采用有源电感负载技术和放大器直接耦合技术以提高增益,拓展带宽,降低功耗并保持了良好的噪声性能.电路采用3.3V单电源供电,电路增益可达50dB,输入动态范围小于5mVpp,最高工作速率可达7Gb/s,均方根抖动小于0.03UI.此外核心电路功耗小于40mW,芯片面积仅为0.70mm×0.70mm.可满足2.5,3.125和5Gb/s三个速率级的光纤通信系统的要求.     

Scheduling Algorithms for Packet-Oriented MAC Protocols in Wireless Multimedia Systems

Future generation wireless multimediacommunications will require efficient Medium AccessControl (MAC) protocols able to guarantee suitable Qualityof Service (QoS) levels for different traffic classes whileachieving a high utilization of radio resources. This paperproposes a new scheduling technique to be adopted at the MAClevel in wireless access systems, named Dynamic Scheduling-Time DivisionDuplexing (DS-TDD), that efficiently managesvideo, voice, Web and background traffics. A theoretical approachis proposed in this paper to evaluate the DS-TDD performance withvoice and Web traffics. Simulation results have permitted tohighlight the following promising characteristics of the DS-TDDscheme: (i) a high capacity of real-time traffics isattained with a QoS insensitive to Web and background trafficloads; (ii) a high throughput can be guaranteed whilepreserving the QoS levels of the different traffic classes;(iii) heavier downlink traffic loads do not modify the QoSof uplink traffics. Finally, extensive comparisons with differentscheduling schemes proposed in the literature have permitted tohighlight the better performanceof DS-TDD.     

宽工作电压范围单电源CMOS误差放大器

采用0.8μm标准数字CMOS工艺(VTN0=0.836V,VTP0=0.930V),设计并流片验证了具有宽工作电压范围(3～6V),可作SOC系统动态电源管理芯片内部误差放大器应用的单电源CMOS运算放大器。该误差放大器芯核同时具有适合低电压工作,并对工艺参数变化不敏感的优点。对于相同的负载情况,在3V的工作电压下,开环电压增益AD=83.1dB,单位增益带宽GB=2.4MHz,相位裕量Φ=85.2°,电源抑制比PSRR=154.0dB,转换速率Sr=2.2V/μs;在6V工作电压下,AD=85.1dB,GB=2.4MHz,Φ=85.4°,PSRR=145.3dB,Sr=3.4V/μs。     

21~28GHz波段平衡式放大器

采用OMM IC的0.2μm PHEM T工艺设计了工作在21~28 GH z的平衡式放大器。正交耦合电桥采用兰格电桥。兰格电桥和平衡式放大器的在片测试结果和仿真结果基本吻合,平衡式放大器在21~28 GH z的增益为18~20 dB,输入和输出回波损耗小于-20 dB,在26 GH z处的输出1 dB压缩点功率为21 dBm。