Extending SSD Lifespan with Comprehensive Non-Volatile Memory-Based Write Buffers

Journal of Computer Science and Technology - New non-volatile memory (NVM) technologies are expected to replace main memory DRAM (dynamic random access memory) in the near future. NAND flash...     

一种低功耗Cache设计技术的研究

低功耗、高性能的cache系统设计是嵌入式DSP芯片设计的关键。本文在多媒体处理DSP芯片MD32的设计实践中，提出一种利用读／写缓冲器作为零级cache，减少对数据、指令cache的读／写次数，由于缓冲器读取功耗远远小于片上cache，从而减小cache相关功耗的方法。通过多种多媒体处理测试程序的验证，该技术可减少对指令cache或者数据cache20％～40％的读取次数，以较小芯片面积的增加换取了较大的功耗降低。     

An accurate and practical buffer allocation model for the buffer cache based on marginal gains

A new dynamic buffer allocation strategy based on the notion of marginal gains is presented for the buffer cache that is used by the operating system to store frequently accessed disk blocks in main memory, and the performance of the proposed strategy is compared with those of previous allocation strategies. In the proposed strategy, marginal gain values are predicted by exploiting functions that approximate the expected number of buffer hits per unit time. Experimental results from both trace-driven simulation and an actual implementation in the FreeBSD operating system show that the proposed strategy accurately predicts the marginal gain values for various workloads resulting in significantly improved buffer hit ratios.     

Experience with Applying Formal Methods to Protocol Specification and System Architecture

In the last three years or so we at Enterprise Platforms Group at Intel Corporation have been applying formal methods to various problems that arose during the process of defining platform architectures for Intel's processor families. In this paper we give an overview of some of the problems we have worked on, the results we have obtained, and the lessons we have learned. The last topic is addressed mainly from the perspective of platform architects.     

点阵汉字库到PROTEL元件符号图形库的转换

本文介绍了PROTEL元件符号图形库和点阵汉字库的结构,以及怎样将点阵汉字库转换到PROTEL元件符号图形库的方法。从而提出一种在利用PROTEL设计电路原理图时,加入汉字标注的途经。     

基于预测与优先级缓存的MIPv6切换算法

为了提升移动IPv6的切换性能,保证实时性要求高的音频、视频等业务的服务质量,针对去除DAD过程的RDMIPv6方案未考虑在传输速率相对较慢的无线信道中,移动节点向NAR本地注册所产生的时延以及切换过程中引入的丢包问题,提出一种优化方案PCRD-MIPv6。PCRD-MIPv6方案结合基于L2触发的切换预测和数据包优先级缓存机制,在L2切换完成之前向移动节点MN维护的接入路由器缓存列表T_AR中的所有AR发送MOA实现本地注册,与此同时,将切换过程中的数据包按优先级缓存在PAR中,在切换完成后发往移动节点,从而减少切换过程中的丢包率。NS-2仿真结果表明,PCRD-MIPv6方案有效地减少了切换时延,降低了切换过程中的丢包率。     

软件定义网络中利用IMKVS结合NFV的分布式网络负载均衡策略

社交网络和其他云应用程序应该能对从数据中心发出的请求作出快速响应,实现这种请求的技术之一是内存中的键值存储（IMKVS）,它是一种缓存机制,目的是为了提高整体用户体验。一般地,IMKVS系统使用一致性哈希来决定在哪存储目标,一致性哈希使用起来方法简单,但可能引起网络负载的不平衡。为了提高IMKVS的缓存性能,提出一种软件定义网络中利用IMKVS结合NFV的分布式网络负载均衡策略。该策略包含两个阶段,第一阶段设计通用的SDN负载平衡器的模块,以运行不同的负载平衡算法;第二阶段是基于IMKVS的专业化缓存,可以实现通信管理和数据复制。仿真结果表明,相比于一致性哈希,缓存服务器上的负载可改善24%,网络上的负载可改善7%,策略能够使资源利用更合理,获得更好的用户体验。     

Index-Based Cache Coherence Protocol

A multiprocessor envirorLment may encounter many problems such as deadlock, load balancing and cache coherence. However, the latter is considered the most dangerous if not properly designed, the system works naturally but generates inaccurate results. This occurs if obsolete versions of a memory block are used. Users may not be aware of the presence of such problem. Two main approaches are known to maintain data consistency： namely, snoopy and directory-based protocols. Each approach has its advantages and limitations. This paper proposes a new technique that considers both previously mentioned approaches. The network architecture is slightly updated by adding an index table to each processor. The proposed protocol is expected to reduce the access time, decrease the number of accesses to main memory, maintain data consistency, and assure the usage of the most recent value of a shared variable.     

移动环境下一种缓存管理策略

移动计算环境中带宽具有非对称性,并且移动设备资源有限,传统的缓存管理策略需要占用大量的设备计算资源和网络带宽,有效的缓存管理技术能够极大提高移动计算的性能。对此提出一系列的针对移动计算的缓存管理策略。首先根据用户访问频率建立对应的具有生命周期的数据项缓存,然后使用自适应一致性维护策略维护缓存的一致性。通过实验分析,提出的管理策略能够很好地降低带宽占用,并且有效地减少对移动客户端的资源需求。