基于FPGA的RAID6硬件加速器的实现

设计了基于FPIGA的RAID6磁盘阵列的硬件加速器,将占用大量CPU周期的RAID6校验算法,用FPGA硬件实现并设计了软件与加速器的交互接口,将CPU从繁重的计算任务中解放出来,系统的处理速度和响应速度得到很大提升.     

Analysis of coding risks in progressive transmission

In progressive image transmission, there exist some risks which may appear during the processing. A first class of risks is the diminishing coding performance when the occurrence of insignificant coefficients at each transmission time is a small-probability event. It may be a catastrophic transmission risk which can lead to major and irreversible bit losses. In a second class of risks, the performance of the transmission technique diminishes though the occurrence of insignificant sample is still a large-probability event.This paper shows a “Test of Transmission Risks” which can be used to analyze, for a given image, the performance of the state of the art in progressive transmission from the viewpoint of the catastrophic transmission risks. To this aim we make use of a decision making tool based on axioms requiring sensitivity to coding situations where the occurrence of insignificant sample at the transmission time may be either a small-probability or a large-probability event.     

WCDMA网络中引入TrFO技术的相关问题探讨

文章分析了TrFO对呼叫建立流程、参数设置的要求，以及TrFO编码协商失败时网络的处理方式，提出了在WCDMA网络中引入TrFO技术的具体实施建议。     

基于OMAP3530硬件平台的ARM和DSP协同开发方法

以OMAP3530为硬件平台,以DVSDK为软件工具,介绍了协同开发环境的搭建方法。说明了OMAP3530中ARM和DSP协同开发的两种方法,并对两种方法的优缺点进行了比较。     

Fast Motion Estimation Algorithm with Edge Alignment for H.264 Encoder

Image sequences processing and video encoding are extremely time consuming problems. The time complexity of them depends on image contents. This paper presents an estimation of a block motion method for video coding with edge alignment. This method uses blocks of size 4 × 4 and its basic idea is to find motion vector using the edge position in each video coding block. The method finds the motion vectors more accurately and faster than any known classical method that calculates all the possibilities. Our presented algorithm is compared with known classical algorithms using the evaluation function of the peak signal-to-noise ratio. For comparison of the methods we are using parameters such as time, CPU usage, and size of compressed data. The comparison is made on benchmark data in color format YUV. Results of our proposed method are comparable and in some cases better than results of standard classical algorithms.     

DaVinci技术DM6467平台算法的开发

DM6467达芬奇技术的远程算法是基于ARM＋DSP双核架构的编解码压缩算法。它的实现过程是通过DSP端对算法进行xDM标准的开发和封装并配置其算法服务器,在ARM端配置其算法引擎,然后通过中间层软件Codec Engine调用其API函数来实现执行的。     

一套数字音频采集、播放和传输系统的实现

本文介绍一种利用Codec芯片TLV320AIC23和DSP C5409实现数字音频采集、播放和传输系统.     

一种TTCN-3编解码器的演化方法

软件需求常常发生变化,导致软件经常被演化。由于 使用TTCN-3对演化后的软件进行测试时需要为大部分测试脚本重新开发编解码器,因此有必要对原来的编解码器进行演化,以提高测试效率。分析了TTCN-3编解码器的研究现状,提出了一种结合测试套文件对编解码器进行演化的方法。实验表明,该方法是可行的,为TTCN-3测试系统的使用提供了方便。     

VoIP中语音压缩编解码器的研究与实现

在当前网络状况下,高效的语音压缩编解码器可以节省网络传输带宽,解决网络拥挤问题.本文通过对语音特性的分析,结合共扼结构代数码本激励线性预测算法提出了一种运算量较小但有效的话音激活检测算法,进一步将平均比特率降低到约4kb/s.经过实验分析,以上设计和实现能够很好地满足VoIP中全双工实时语音通信的要求.     

连续可变斜率增量调制编解码器的设计

连续可变斜率增量调制是一种性能良好的音节压扩自适应增量调制,非常适合语音信号的编解码,其硬件实现简单,抗噪声能力强,研究了连续可变斜率增量调制算法,并通过计算机模拟对系统参数及系统性能进行讨论和优化,给出了硬件实现的具体线路图,对模拟结果进行了讨论。