一种新型多功能建筑胶

该胶研制了一种由脲醛改性聚乙烯醇水性胶组成、具有成本低、性能好、用途广等特点，可广泛用于建筑及装饰行业的建筑胶。     

Multi-Kepler GPU vs. multi-Intel MIC for spin systems simulations

We present and compare the performances of two many-core architectures: the Nvidia Kepler and the Intel MIC both in a single system and in cluster configuration for the simulation of spin systems. As a benchmark we consider the time required to update a single spin of the 3D Heisenberg spin glass model by using the Over-relaxation algorithm. We present data also for a traditional high-end multi-core architecture: the Intel Sandy Bridge. The results show that although on the two Intel architectures it is possible to use basically the same code, the performances of a Intel MIC change dramatically depending on (apparently) minor details. Another issue is that to obtain a reasonable scalability with the Intel Phi coprocessor (Phi is the coprocessor that implements the MIC architecture) in a cluster configuration it is necessary to use the so-called offload mode which reduces the performances of the single system. As to the GPU, the Kepler architecture offers a clear advantage with respect to the previous Fermi architecture maintaining exactly the same source code. Scalability of the multi-GPU implementation remains very good by using the CPU as a communication co-processor of the GPU. All source codes are provided for inspection and for double-checking the results.     

Fast computation of computer-generated hologram using Xeon Phi coprocessor

We report fast computation of computer-generated holograms (CGHs) using Xeon Phi coprocessors, which have massively x86-based processors on one chip, recently released by Intel. CGHs can generate arbitrary light wavefronts, and therefore, are promising technology for many applications: for example, three-dimensional displays, diffractive optical elements, and the generation of arbitrary beams. CGHs incur enormous computational cost. In this paper, we describe the implementations of several CGH generating algorithms on the Xeon Phi, and the comparisons in terms of the performance and the ease of programming between the Xeon Phi, a CPU and graphics processing unit (GPU).     

Memory E?cient Two-Pass 3D FFT Algorithm for Intelr Xeon PhiTM Coprocessor

Equipped with 512-bit wide SIMD instructions and large numbers of computing cores, the emerging x86-based Intelr Many Integrated Core (MIC) Architecture provides not only high floating-point performanc...     

有限元网格积分算法在MIC众核平台上的并行实现

基于英特尔集成众核(Many Integrated Core,MIC)架构,将有限元网格积分算法在至强融核(Xeon Phi)协处理器做了移植和性能分析。该应用全面测试了有限元分析的核心计算过程在MIC上的加速效果,实现了卸载模式(offload)[1]下利用OpenMP在MIC上的线程并行化。计算性能测试结果显示集成众核平台可以有效地加速有限元网格积分算法:1)一块被充分利用的MIC设备卡(3115A)的计算能力超过两路16核Intel XeonTM E5-2670 CPU;2)MIC并发的物理线程可能由于公共缓存访问存在竞争而降低程序的扩展性。测试结果还显示了在多CPU多MIC平台上进一步移植完整的MPI并行有限元模拟软件的可行性。这项工作有助于推动与有限元网格相关的科学和工程高性能计算的研究。     

复杂地形下自动提取多暗像元的TM影像大气纠正方法

复杂地形条件下气溶胶的空间分布变化较大,用单一的气溶胶实测参数或单一的暗像元进行大气纠正都难以获得好的效果,手动选取暗像元还受限于专业人员的经验。通过程序自动提取图像中的浓密植被像元以及位于山区阴影的植被像元作为暗像元,使得暗像元均匀分布于图像的各个区域、各个海拔,更好地模拟复杂地形下的大气状况。根据辐射传输模型,利用迭代、插值等方法获取TM1和TM3波段光学厚度,进而推算成像时刻的气溶胶波长指数及混浊度系数,从而得到各个波段的大气光学厚度以实现大气纠正。     

多结点样条插值及其多尺度细化算法

针对风线与曲面拟事问题，研究多结点样条插值方法。这类方法具有基数型，显式计算及局部性等优点。主要的新结果是：对多结点样条基本函数的构造给出了新的表述；提出了一类新的不带移动的混合形多结点样条基本函数；基于多尺度分析的思想，给出了一种自适应的细化算法，它对消减采样数据的相关性是简便有效的。     

巧用GHOST多播功能实现网络克隆

对目前计算机网络机房维护技术中，采用的Ghost多播功能进行了详细的研究，并详细指出了进行网络克隆快速恢复计算机软件系统的具体实现步骤。     

声波在锅炉换热器管阵列中的传播特性研究

基于对炉内单排和双排换热器管阵列声传播特性的研究基础,分析多排管阵列对声波的反射、透射和衍射机理;利用数学推理方法和迭代过程给出计算炉内多排管阵列声透射与反射系数的数学模型,研究多排换热器管阵列的声透射特性,揭示炉内多排管阵列的声反射与透射系数随声波频率、管排数和管阵列结构参数的变化关系;并在炉内实际温度下对声透射系数进行数值计算,为锅炉管道泄漏检测技术提供理论依据.     

声波在锅炉换热器管阵列中的传播特性研究

基于对炉内单排和双排换热器管阵列声传播特性的研究基础,分析多排管阵列对声波的反射、透射和衍射机理;利用数学推理方法和迭代过程给出计算炉内多排管阵列声透射与反射系数的数学模型,研究多排换热器管阵列的声透射特性,揭示炉内多排管阵列的声反射与透射系数随声波频率、管排数和管阵列结构参数的变化关系;并在炉内实际温度下对声透射系数进行数值计算,为锅炉管道泄漏检测技术提供理论依据.