A Compositional Framework for Hardware/Software Co-Design

We describe a compositional framework, together with its supporting toolset, for hardware/software co-design. Our framework is an integration of a formal approach within a traditional design flow. The formal approach is based on Interval Temporal Logic and its executable subset, Tempura. Refinement is the key element in our framework because it will derivefrom a single formal specification of the system the software and hardware parts of the implementation, while preserving all properties of the system specification. During refinement simulation is used to choose the appropriate refinement rules, which are applied automatically in the HOL system. The framework is illustrated with two case studies. The work presented is part of a UK collaborative research project between the Software Technology Research Laboratory at the De Montfort University and the Oxford University Computing Laboratory.     

软硬件协同设计语言System C在SoC设计中的应用

软硬件协同设计是未来VLSI设计的发展趋势.作为新的系统级VLSI设计标准,System C是一种通过类对象扩展的基于C/C++建模平台,支持系统级软硬件协同设计、仿真和验证.文章讨论了SystemC复杂芯片设计中的设计流程、设计优势,并给出具体设计实例.     

Empathic negotiations through material culture: co-designing and making digital exhibits

Abstract

This article introduces a case study undertaken in the indigenous Penan community of Long Lamai, Upper Baram, Sarawak, Malaysia. In this community, there is concern about the negative image other cultural groups hold of the Penan. This case study explores co-design as a means to invite community members, together with a designer, to explore the identity that they would like to present to people outside the community. In preparing for an exhibition to challenge perceptions, it turned out to be important to embrace the culture of the community to facilitate self-expression, introducing new concepts such as technological interventions and design probes to stimulate reflection and creativity. However, it was indigenous material culture, when actively and encouragingly supported by the designer, that had a key role in developing the co-design and, with it, empathic understanding between designer and community.     

基于RISC-V处理器的卷积加速SoC系统设计

为提高卷积神经网络（CNN）的计算效率和能效,以8 bit定点数据作为输入,设计一个支持激活、批标准化以及池化等CNN网络中常见计算类型的卷积加速器,优化循环计算顺序并将其与数据复用技术相结合,以提高卷积计算的效率。基于软硬件协同设计思想,构建包含RISC-V处理器和卷积加速器的SoC系统,RISC-V处理器基于开源的指令集标准,可以根据具体的设计需求扩展指令功能。将该SoC系统部署在Xilinx ZCU102开发板上,RISC-V处理器和卷积加速器分别工作在100 MHz和300 MHz频率下,测试结果表明,该加速器的算力达到153.6 GOP/s,运行VGG16网络进行图片推理计算时加速效果较好。     

异构多核Zynq处理器的伺服控制系统设计

本文介绍了基于Zynq的伺服控制系统设计,以ZYBO板为核心,以基于Xilinx工具的软硬件协同设计为开发方法,结合ARM和FPGA各自的优势,对软硬件进行了明确划分,Zynq片内FPGA端完成运动控制,ARM端完成视频监控等功能,ARM和FPGA通过片内AXI总线完成数据快速交换,实现了伺服系统的精确、快速控制,并使运动过程具有良好的可视性.     

控制与通信协同设计的新进展

详尽地论述、分析、对比和讨论了网络化控制系统中的控制与通信协同设计问题．通过对该问题国内外研究现状的分析,强调了控制与通信协同设计研究的必要性、重要性和紧迫性,并着重从通信序列及通信协议两个方面阐述了控制与通信协同设计研究领域存在的不足、现有解决策略及主要结果的分析和对比,从而指出该领域急需解决的科学问题、可能的求解方向和今后的发展趋势,并为将来的研究工作提出了有益的建议和参考思路．     

可重构振荡器与双频滤波器的协同设计

实现了一种可重构振荡器与双频率滤波器的协同设计模块。振荡器通过开关二极管的通断来实现频率的可重构,工作频率分别为1.1 GHz和2.0 GHz。与双频滤波器协同设计后,振荡器在两个频率上频偏1 MHz的相位噪声分别从-109.1 dBc/Hz和-112.9 dBc/Hz改善为-125.6 dBc/Hz和-127.9 dBc/Hz,二次谐波抑制分别由协同设计之前的-25 dB和-10 dB改善为-44 dB和-55 dB。     

基于SoPC的实时说话人识别控制器

运用软硬件协同设计,在DE2-70开发板上实现了一个基于SoPC的实时说话人识别控制器,控制器有很好的实时性和良好的识别性能。控制器的语音特征参数采用线性预测倒谱系数(LPCC),匹配算法采用动态时间规整算法(DTW)。     

降低协同设计虚拟机启动开销的译码后指令缓存技术

协同设计虚拟机采用动态二进制翻译实现不同体系结构间的二进制兼容,对源指令的翻译和处理影响了协同设计虚拟机的启动性能.研究发现,在一个采用解释执行和翻译相结合的协同设计虚拟机中,处理非热点代码的解释执行是虚拟机启动开销的主要来源.发现了协同设计虚拟机中的解释例程局部性,并提出了一种硬件译码后指令缓存结构DICache(d...