基于Stateflow电力机车变流器控制设计与实现

某出口型号交流电力机车牵引控制系统要求变流器控制逻辑具备接触器控制、牵引系统数据交互、变流器故障保护、变流器启动自检等功能。针对以上功能,基于MATLAB中的Simulink/Stateflow可视化编程工具进行牵引控制模型的搭建,遵循模块化编程理念,采用较少的程序代码编写实现复杂的逻辑控制模型,生成逻辑清晰的控制功能流程图,进行半实物仿真测试,增强控制模型的可靠性。通过该变流器产品型式试验检验,验证变流器控制逻辑的功能可以满足控制系统的需求。     

A novel quasi-oppositional harmony search algorithm and fuzzy logic controller for frequency stabilization of an isolated hybrid power system

The intermittent wind power in isolated hybrid distributed generation (IHDG) may cause serious problems associated with frequency (f) and power (P) fluctuation. Energy storage devices such as battery, super capacitor, and superconducting magnetic energy storage (SMES) may be used to reduce these fluctuations associated with f and P. This paper presents a study of IHDG power system for improving both f and P deviation profiles with the help of SMES. The studied IHDG power system is consisted of wind turbine generator and diesel engine generator. Both f and P control problems of the studied power system model are addressed in presence or absence of SMES. Fuzzy logic based proportional–integral–derivative (PID) controller with SMES is used for the purpose of minimization of f and P deviations. The different tunable parameters of the PID controller and those of the SMES are tuned by a novel quasi-oppositional harmony search algorithm. Performance study of the IHDG power system model is carried out under different perturbation conditions. The results demonstrate minimum f and P deviations may be achieved by using the proposed fuzzy logic based PID controller along with SMES.     

Kariya (Hildegardia barteri) seed oil extraction: comparative evaluation of solvents,modeling, and optimization techniques

In this work, the effects of solid/solvent ratio (0.10–0.25?g/ml), extraction time (3–8?h), and solvent type (n-hexane, ethyl acetate, and acetone) together with their shared interactions on Kariya seed oil (KSO) yield were investigated. The oil extraction process was modeled via response surface methodology (RSM), artificial neural network (ANN) and adaptive neuro-fuzzy inference system (ANFIS) while the optimization of the three input variables essential to the oil extraction process was carried out by genetic algorithm (GA) and RSM methods. The low mean relative percent deviation (MRPD) of 0.94–4.69% and high coefficient of determination (R²) > 0.98 for the models developed demonstrate that they describe the solvent extraction process with high accuracy in this order: ANFIS, ANN, and RSM. The best operating condition (solid/solvent ratio of 0.1?g/ml, extraction time of 8?h, and acetone as solvent of extraction) that gave the highest KSO yield (32.52?wt.%) was obtained using GA-ANFIS and GA-ANN. Solvent extraction efficiency evaluation showed that ethyl acetate, n-hexane, and acetone gave maximum experimental oil yields of 19.20?±?0.28, 25.11?±?0.01, and 32.33?±?0.04?wt.%, respectively. Properties of the KSO varied based on the type of solvent used. The results of this work showed that KSO could function as raw material in both food and chemical industries.     

Compensation of voltage disturbances using PEMFC supported Dynamic Voltage Restorer

The continuity of supply and quality of power are the two main significant aspects of today’s power delivery system. The Dynamic Voltage Restorer (DVR) is a series connected custom power device which improves the quality of power delivered to the consumers. This paper deals with the effectual exploitation of DVR for interconnecting the proton exchange membrane fuel cell (PEMFC) stack to the grid based on optimized proportional integral (PI) and fuzzy logic (FL) Controller. The real coded Genetic algorithm (GA) is used to optimize the PI controller parameters. The PEMFC operated boost converter is used to boost up the fuel cell output voltage to balance the DC side necessities of the voltage source converter (VSC). The proposed DVR provides balanced and unbalanced voltage sag/swell compensation, harmonic reduction as well as an active power injection to the grid. The designed method also protects the sensitive loads from source side power quality disturbances including short term interruption. In addition, the harmonic compensation performance of the proposed work is validated by comparing with the results of the H^∞ controller based DVR under medium level voltage condition. The simulation results from MATLAB/SIMULINK are discussed to prove the effectiveness of the planned method.     

Protection of power transformer using multi criteria decision-making

Power transformers are protected by different relays that operate independently. Malfunction of each relay has a major role in reducing the reliability of the protection system. In order to mitigate the main drawbacks of the power transformer relays, an overall protection scheme is presented in this paper. This scheme proposes a novel multi criterion algorithm using decision-making based on fuzzy logic. In this paper the outputs of restricted earth fault relay and a directional check unit, are combined with the output of the differential protection relay. Therefore, problems that are pertaining to independent operation of each relay have been mitigated and the relays cover protection blind spots of each other. The improved power transformer protection (IPTP) scheme enhances the sensitivity and reliability of the power transformer protection. Extensive simulations are used to measure the effectiveness and merit of the proposed IPTP relay. The above efforts result in a multi criteria approach for protection of power transformers.     

Compiler compatible 5.66 Mb/mm2 8T 1R1W register file in 14 nm FinFET technology

1-read/1-write (1R1W) register file (RF) is a popular memory configuration in modern feature rich SoCs requiring significant amount of embedded memory. A memory compiler is constructed using the 8T RF bitcell spanning a range of instances from 32 b to 72 Kb. An 8T low-leakage bitcell of 0.106 μm² is used in a 14 nm FinFET technology with a 70 nm contacted gate pitch for high-density (HD) two-port (TP) RF memory compiler which achieves 5.66 Mb/mm² array density for a 72 Kb array which is the highest reported density in 14 nm FinFET technology. The density improvement is achieved by using techniques such as leaf-cell optimization (eliminating transistors), better architectural planning, top level connectivity through leaf-cell abutment and minimizing the number of unique leaf-cells. These techniques are fully compatible with memory compiler usage over the required span. Leakage power is minimized by using power-switches without degrading the density mentioned above. Self-induced supply voltage collapse technique is applied for write and a four stack static keeper is used for read Vmin improvement. Fabricated test chips using 14 nm process have demonstrated 2.33 GHz performance at 1.1 V/25 °C operation. Overall V_min of 550 mV is achieved with this design at 25 °C. The inbuilt power-switch improves leakage power by 12x in simulation. Approximately 8% die area of a leading 14 nm SoC in commercialization is occupied by these compiled RF instances.     

Small‐Sized High‐Power PIN Diode Switch with Defected Ground Structure for Wireless Broadband Internet

This letter presents a small‐sized, high‐power single‐pole double‐throw (SPDT) switch with defected ground structure (DGS) for wireless broadband Internet application. To reduce the circuit size by using a slow‐wave characteristic, the DGS is used for the quarter‐wave (°/4) transmission line of the switch. To secure a high degree of isolation, the switch with DGS is composed of shunt‐connected PIN diodes. It shows an insertion loss of 0.8 dB, an isolation of 50 dB or more, and power capability of at least 50 W at 2.3 GHz. The switch shows very similar performance to the conventional shunt‐type switch, but the circuit size is reduced by about 50% simply with the use of DGS patterns.     

Adsp-21060的主机接口在实时图像处理中的应用

简要介绍了数字信号处理器Adsp 2 10 6 0和大规模可编程逻辑器件EP1K5 0。详细讨论了Adsp 2 10 6 0的主机接口工作模式以及一个实时图像跟踪处理器的硬件组成原理 ,在这个系统中EP1K5 0充当了主机。调试结果表明 ,所提出的硬件结构设计思想工作效率高 ,完全能够胜任实时图像处理的实际需要。     

2.4GHz动态CMOS分频器的设计

对现阶段的主流高速CMOS分频器进行分析和比较,在此基础上设计一种采用TSPC(truesingle phase clock)和E-TSPC(extended TSPC)技术的前置双模分频器电路.该分频器大大提高了工作频率,采用0.6μm CMOS工艺参数进行仿真的结果表明,在5V电源电压下,最高频率达到3GHz,功耗仅为8mW.     

SOI光电子集成

SOI（Silicon-on-Insulator)光电子集成已成为十分引人注目的研究课题，其工艺与CMOS工艺完全兼容，可以实现低成本的SOI基整片集成光电子回路。本文综述了近几年来SOI集成光电子器件的发展以及一些最新的研究进展，着重分析几种最新型光无源器件的工作原理和结构，包括SOI光波导、SOI光波导耦合器、SOI光波导开关、相位阵列波导光栅（PAWG）、基于SOI的光探测器等，并介绍了中国科学院半导体所集成光电子国家重点实验室的研究进展。