对象族可镇定半径的计算

本文采用优化方法把计算对象族的可镇定半径问题转化成优化问题。2范数定义下的可镇定半径采用了Lagrange乘子法求解；无穷范数意义下的可镇定半径采用了最小范数解方法求解。本文方法对可镇定半径的定义形式和不确定参数结构没有要求，因此更具有一般性。     

SOC设计中的浮动压焊块电源/地线网络设计和优化

随着VLSI工艺技术的发展和芯片规模的不断增加，尤其是在SOC设计中，原有的那种供电压焊块只能位于芯片边缘的确定益的模式已经不能够满足整个电路性能的需要。在很多情况下，依靠在电源线的拓扑结构确定后的线宽优化，还是无法保证在有限的布线资源下为电路提供可靠的高性能的供电需求。由此，出现了在芯片边缘上浮动放置压焊块及在芯片的顶部放置供电压焊块阵列的方法。文中提出了一种用于SOC设计中新的基于树型结构的浮动压焊块的电源／地线网络优化算法，经过MCNC电路实例测试后得到明显的优化结果。     

32位MIPS微处理器中乘法器的设计和实现

在Booth算法的基础上,结合MIPS 4KC微处理器中的流水线结构和乘法器的工作过程,提出了一种改进的Booth乘法器的设计方法,并采用全制定方法实现,用这种方法实现的乘法器单元具有面积小、单元电路可重复性好、版图设计工作量小、功耗低等特点.     

Active set truncated-Newton algorithm for simultaneous optimization of distillation column

An active set truncated-Newton algorithm (ASTNA) is proposed to solve the large-scale bound constrained sub-problems. The global convergence of the algorithm is obtained and two groups of numerical experiments are made for the various large-scale problems of varying size. The comparison results between ASTNA and the subspace limited memory quasi-Newton algorithm and between the modified augmented Lagrange multiplier methods combined with ASTNA and the modified barrier function method show the stability and effectiveness of ASTNA for simultaneous optimization of distillation column.     

Design of pole-assignment controller for systems with algebraic-equation constraint

In this paper we have studied the control of linear systems with algebraic-equation constraint. A pole-assignment controller with two-layer structure for such constrained systems has been presented. The objective of the controller is to assign the desired poles to constrained system and simultaneously force the corresponding closed-loop system to satisfy the constraint. The conditions for the existence of pole-assignment controller are discussed in different cases. The implementation algorithm of pole-assignment controller is also presented. An example is given to illustrate the validity of the method in this paper.     

Scanning electron microscope electron detector with a radial type discrete dynode electron multiplier

A discrete dynode electron multiplier with radial flux of electrons was built and tested in the range of low‐voltage scanning electron microscopy as a backscattered electron detector of topographic contrast. The multiplier collects backscattered electron emitted in a specific range of take‐off angles and over the whole azimuth angular range enabling large solid collection angle. Multipliers with different dynode shapes were studied theoretically with the use of the software for particle optics and three assemblies were built and tested experimentally. The gain estimation, assessment of the type of detected electrons (secondary electron or backscattered electron), imaging the spatial collection efficiency and signal‐to‐noise measurements were performed.     

模拟乘法器的简易分析方法

提出了一种模拟乘法器工作原理的简易分析方法，与通用的一般方法相比，这种方法避开了较复杂的数学推导，采用大学熟悉的公式从而使分析过程简便易懂。     

寄生电容不敏感的开关电容乘法器的设计与分析

本文论述了寄生电容不敏感型开关电容四象限模拟乘法器的设计，并提出了一种新型的电路结构，分析了它的性能，以及元器件的非理想特性对其性能的影响和采取的补偿方法。     

Time jitter analysis of 1-bit sigma-delta synthesizer

This letter presents a general analysis of time jitter in sigma-delta synthesizer. One of the practical applications of 1-bit sigma-delta systems is a generation of high-resolution local oscillator (LO) signals. In order to generate LO signals, one may use a single-bit sigma-delta technique to encode sine waves. Today, direct generation of high-frequency sine wave using a clock with higher frequency, is possible. In this letter, we will analyze different LO signal generators and develop a practical way of computation to decide how to choose the best configuration under minimum degradation of signal-to-noise ratio (SNR) at the output.