Template guided self-assembling two-dimensional array of Au@SiO2 core-shell nanoparticles for room-temperature single electron transistors |
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Authors: | Yang Yong Nogami Masayuki Shi Jianlin Ruan Meiling |
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Affiliation: | Department of Materials Science and Engineering, Nagoya Institute of Technology, Showa, Nagoya 466-8555, Japan. |
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Abstract: | The composite nanoparticles of a gold core capped by a SiO2 shell with well-controlled thickness have been synthesized and fabricated into two-dimensional array on silicon surface by a simple self-assembly method combined with an AFM nanolithography technique. Current-voltage measurements of the Au@SiO2 composite nanoparticles (shell thickness of 6 nm) show a well-pronounced Coulomb staircase with a period of 300 mV at room temperature, demonstrating single electron transistor behavior. The step width of the Coulomb staircase can be tuned by controlling the thickness of SiO2 shell. The tunable single electron tunneling properties make the 2D array of Au@SiO2 composite nanoparticles an ideal candidate for planar single electron transistor devices. |
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