| Viterbi译码在TD-SCDMA测试平台中的应用 |
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| 引用本文： | 吕圣洁,张劲鹏,李小文. Viterbi译码在TD-SCDMA测试平台中的应用[J]. 通信技术, 2007, 40(8): 12-13,16 |
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| 作者姓名： | 吕圣洁 张劲鹏 李小文 |
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| 作者单位： | 重庆邮电大学,重邮信科3G研究院,重庆,400065 |
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| 基金项目： | 重邮信科股份有限公司重点863项目 |
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| 摘 要： | 根据3GPP的规定提出了TD-SCDMA网络测试平台中的Viterbi译码器的DSP实现方案。该方案兼顾了资源消耗和译码效率,提高了译码器的硬件结构和整体性能.通过对TD-SCDMA终端维特比译码的理解,设计出相应网络测试平台中的译码器。并给出了其DSP实现程序,利用CCS集成环境平台和TMS320C55XDSP芯片进行仿真分析。由仿真和测试结果表明,该实现方法在实际应用中检测效果很好。
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| 关 键 词： | Viterbi译码 回溯 |
| 文章编号： | 1002-0802（2007）08-0012-02 |
| 修稿时间： | 2007-04-26 |
DSP implementation of Viterbi Decoding in the TD-SCDMA Test Platform |
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| LV Sheng-jie,ZHANG Jin-peng,LI Xiao-wen. DSP implementation of Viterbi Decoding in the TD-SCDMA Test Platform[J]. Communications Technology, 2007, 40(8): 12-13,16 |
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| Authors: | LV Sheng-jie ZHANG Jin-peng LI Xiao-wen |
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| Affiliation: | Chongqing University of Posts and Telecommunications, Chongqing 400065, China |
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| Abstract: | According to the 3GPP, The DSP implementation design of Viterbi decoding in the TD-SCDMA test platform is proposed. The resource consuming and decoding efficiency are considered in the deisgn, the hardware structure and the performance are also improved on in it. Based on understanding of the Yiterbi decoding in the TD-SCDMA cellphone, decoder in the testing platform is designed, and DSP programming is proposed as well. The Viterbi decoding is simulated with TMS320C55X chips under the environment of CCS. The simulation and testing results indicate that the effect of this design is quite well in the practical application. |
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| Keywords: | DSP CCS |
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