Dynamic Self‐Repair Architectures for Defective Through‐silicon Vias

Three‐dimensional integration technology results in area savings, platform power savings, and an increase in performance. Through‐silicon via (TSV) assembly and manufacturing processes can potentially introduce defects. This may result in increases in manufacturing and test costs and will cause a yield problem. To improve the yield, spare TSVs can be included to repair defective TSVs. This paper proposes a new built‐in self‐test feature to identify defective TSV channels. For defective TSVs, this paper also introduces dynamic self‐repair architectures using code‐based and hardware‐mapping based repair.