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带偏差约束的时钟线网的拓扑构造和优化
引用本文:刘毅,洪先龙,蔡懿慈.带偏差约束的时钟线网的拓扑构造和优化[J].半导体学报,2002,23(11):1228-1232.
作者姓名:刘毅  洪先龙  蔡懿慈
作者单位:清华大学计算机科学与技术系,北京,100084
基金项目:国家重点基础研究发展计划(973计划);G1998030403;
摘    要:提出了一种新的拓扑构造和优化方法,综合考虑了几种拓扑构造方法的优点,总体考虑偏差约束,局部进行线长优化.实验结果表明,它可以有效控制节点之间的偏差,同时保证减小时钟布线树的整体线长.

关 键 词:时钟布线  拓扑构造  时钟偏差
文章编号:0253-4177(2002)11-1228-05
修稿时间:2002年1月25日

Algorithm for Generating Topology of Skew-Constrained Clock Routing and Optimization
Liu Yi,Hong Xianlong and Cai Yici.Algorithm for Generating Topology of Skew-Constrained Clock Routing and Optimization[J].Chinese Journal of Semiconductors,2002,23(11):1228-1232.
Authors:Liu Yi  Hong Xianlong and Cai Yici
Abstract:A new clock tree topology generation algorithm is proposed for the clock routing.The optimization includes a constructive stage followed by local topology refinement.During the clock tree construction,the skew relationship between clock sinks is considered.Appropriate adjustment to the topology can reduce the delay and skew further.Voronoi diagram is used to accelerate computing.The experimental results show that the algorithm can produce a clock tree with both balanced topology and short wire length.
Keywords:clock routing  topology  clock skew
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