A 1.544-Mb/s CMOS line driver for a 22.8-Ω load

A CMOS line driver for high-speed data communication according to the T1 and CEPT recommendations is presented. The differential output swing is 7.2 V_pp on a load of 22.8 Ω from a single 5-V supply. A novel quiescent current control scheme is used. The driver occupies an area of 6.5 mm² using a 2-μm p-well CMOS technology