Fast and reliable top-level simulation strategy for mixed-signal integrated circuits and its application to DC?DC converters

Top-level, transient, transistor-based simulations are a critical step in the product-development cycle of mixed-signal integrated circuits. These simulations are normally performed just before fabrication and unfortunately impose cumbersome bottlenecks in the design flow. Verification is an iterative process by nature, whereby each problem found requires another simulation to ensure a proper fix is in place, and because of the complexity of a large system, minor errors can cost days, increasing design time and time-to-market. A top-level transistor-based simulation strategy is proposed with minimal time overhead. The strategy is to start with a quick, all macro-model system simulation and gradually substitute one transistor-level sub-block at a time for each additional run. For optimal results, less computationally intensive blocks, which can be determined from a proposed set of screening simulations, are replaced first. The proposed strategy was tested and applied to a buck, current-mode switching regulator, and the results show that simulation overhead is least for linear analogue functions (e.g. op-amps) and worst for high-speed nonlinear circuits (e.g. signal generators). Nonlinear and bi-stable analogue blocks such as bandgap references take more time to simulate than op-amps and less than low frequency digital functions such as power-on-reset, which in turn are less intensive than ramp and pulse generators