| 一种异步快速傅立叶变换处理器设计 |
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| 引用本文： | 赵冰, 仇玉林, 吕铁良, 黑勇,.一种异步快速傅立叶变换处理器设计[J].电子器件,2006,29(3):613-616. |
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| 作者姓名： | 赵冰 仇玉林 吕铁良 黑勇 |
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| 作者单位： | 中国科学院微电子研究所,北京,100029 |
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| 摘 要： | 针对一种异步实现结构的异步快速傅立叶变换处理器，给出了处理器中异步加法器的电路和异步乘法器的结构．该异步快速傅立叶变换处理器采用本地的握手信号代替了传统的整体时钟．通过对一个8点的异步快速傅立叶变换处理器电路仿真，得到该处理器的平均响应时间为31．15ns，仅为最差响应时间42．85ns的72．7％．由此可见，异步快速傅立叶变换处理器在性能方面较同步处理器存在优势。
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| 关 键 词： | 异步集成电路 异步数据通路 异步乘法器 快速傅立叶变换 |
| 文章编号： | 1005-9490（2006）03-0613-04 |
| 收稿时间： | 2005-09-05 |
| 修稿时间： | 2005-09-05 |
An Asynchronous FFT Processor Design in CMOS VLSI |
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| ZHAO Bing,QIU Yu-lin,LV Tie-liang,HEI Yong.An Asynchronous FFT Processor Design in CMOS VLSI[J].Journal of Electron Devices,2006,29(3):613-616. |
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| Authors: | ZHAO Bing QIU Yu-lin LV Tie-liang HEI Yong |
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| Affiliation: | Institute of Microelectronics , Chinese Academy of Sciences, Beijing 100029, China |
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| Abstract: | A novel asynchronous FFT(Fast Fourier Transform) processor is described.The circuits of asynchronous adder and the architecture of multiplier are proposed.The asynchronous FFT processor controls the sequence of logic circuits by local handshake signals instead of the globe clock.The results of performance analysis of an 8-point asynchronous FFT processor show that the average case response time 31.15 ns is only 72.7% the worst-case response time 42.85 ns.It reveals that asynchronous FFT processor has some performance advantages than the synchronous one. |
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| Keywords: | asynchronous circuits asynchronous data-path asynchronous multiplier FFT |
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