The design and implementation of a personal sequential inference machine: PSI |
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Authors: | Minoru Yokota Akira Yamamoto Kazuo Taki Hiroshi Nishikawa Shunichi Uchida |
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Affiliation: | 1. ICOT Research Center, Institute for New Generation Computer Technology, Mita-Kokusai Bldg. 21F, 4-28 Mita 1-chome, Minato-ku, 108, Tokyo, Japan
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Abstract: | A Personal Sequential Inference Machine, called PSI, is a personal computer designed as a software development tool for the Fifth Generation Computer Systems (FGCS) project. PSI has a logic based, highlevel machine instruction set, called Kernel Language Version 0 (KL0). The machine architecture of PSI is specialized for direct execution of KL0. “Unification” and “backtracking” are the principal operations in Logic Programming, and they are efficiently performed by PSI hardware/ firmware. Its estimated execution speed is 20K to 30K LIPS. The machine is also equipped with a large main memory with a maximum of 40 bits×16M words. This paper presents the key points of its design and the features of its machine architecture. |
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