| 基于FPGA的三端口非透明型SDRAM控制器 |
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| 引用本文： | 谢宜壮,龙腾.基于FPGA的三端口非透明型SDRAM控制器[J].微计算机信息,2010(5). |
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| 作者姓名： | 谢宜壮 龙腾 |
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| 作者单位： | 北京理工大学雷达技术研究所; |
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| 摘 要： | 本文采用Altera公司的Stratix系列FPGA实现了一个三端口非透明型SDRAM控制器,该控制器面向用户具有多个端口,通过轮换优先级的设计保证了多个端口平均分配SDRAM的带宽且不会降低传输速率。将访问SDRAM空间虚拟成一个简单的访问三口RAM的操作,采用乒乓的DMA传输机制大大提高了数据传输的带宽和效率。
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| 关 键 词： | FPGA 三端口非透明 SDRAM控制器 轮换优先级 |
Three Ports and Non-Transparent SDRAM Controller Based On FPGA |
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| XIE Yi-zhuang LONG Teng Radar Research LAB,Beijing Institute of Technology,Beijing ,China.Three Ports and Non-Transparent SDRAM Controller Based On FPGA[J].Control & Automation,2010(5). |
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| Authors: | XIE Yi-zhuang LONG Teng Radar Research LAB Beijing Institute of Technology Beijing China |
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| Affiliation: | XIE Yi-zhuang LONG Teng Radar Research LAB,Beijing Institute of Technology,Beijing 100081,China |
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| Abstract: | A three ports and non-transparent SDRAM controller is designed and implemented using Altera's FPGA of Stratix series in this paper,this controller has multi-ports for users.The design method of priority in turns ensures the multi-ports can averagely use the bandwidth of SDRAM without decreasing the transfer speed.It makes accessing SDRAM space as if accessing a simple three ports RAM,the ping-pong DMA transfer method greatly increase transfer bandwidth and efficiency. |
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| Keywords: | FPGA Three ports and non-transparent SDRAM controller Priority in turns |
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