A 3.2-GHz second-order delta-sigma modulator implemented in InP HBTtechnology

This paper presents a second-order delta-sigma (ΔΣ) modulator fabricated in a 70 GHz (f_T), 90 GHz (f_max) AlInAs-GaInAs heterojunction bipolar transistor (HBT) process on InP substrates. The modulator is a continuous time, fully differential circuit operated from ±5 volt supplies and dissipates 1 W. At a sample rate of 3.2 GHz and a signal bandwidth of 50 MHz (OSR=32100 MSPS Nyquist rate) the modulator demonstrates a Spur Free Dynamic Range (SFDR) of 71 dB (12-b dynamic range). The modulator achieves the ideal signal-to-noise ratio (SNR) of 55 dB for a second-order modulator at an oversampling ratio (OSR) of 32. The design of a digital decimation filter for this modulator is complete and the filter is currently in fabrication in the same technology. This work demonstrates the first ΔΣ modulator in III-V technology with ideal performance and provides the foundation for extending the use of ΔΣ modulator analog-to-digital converters (ADC's) to radio frequencies (RF)