数字自动增益控制FPGA设计

针对数字自动增益控制设计存在迭代收敛的问题,本文设计了一种数字同步浮点计算自动增益控制的方法。通过浮点计算,可以准确的计算出增益控制字,实现高稳定度输出,同时使用同步处理减少因数据和增益控制字不同步带来的增益抖动。最后通过算法及FPGA硬件仿真验证了设计的有效性。

Design of FPGA Digital Automatic Gain Control

There is iterative convergence problem in digital automatic gain control design, in this paper, a method of digital synchronization and floating-point automatic gain control is designed. Through floating point calculation, the gain control word can be calculated accurately, achieving good stability output. Simultaneously synchronization is used to reduce the gain jitter caused by the synchronization of data and gain control word. Finally, the validity of design is verified by the algorithm and FPGA hardware simulation.