Clustered defect detection of high quality chips using self-supervised multilayer perceptron

During electrical testing, each die on a wafer must be tested to determine whether it functions as originally designed. When defects, including scratches, stains or localized failed patterns, are clustered on the wafer, the tester may not detect all of the defective dies in the flawed area. A testing factory must assign a few workers to check the wafers and hand-mark the defective dies in the flawed region or close to the flawed region, to ensure that no defective die is present in the final assembly. This work presents an automatic wafer-scale defect cluster identifier that uses a multilayer perceptron to detect the defect cluster and mark all of the defective dies. The proposed identifier is compared with an existing tool used in industry. The experimental results confirm that the proposed algorithm is more effective at identifying defects and outperforms the present approach.