Temperature effects on trigate SOI MOSFETs |
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| Authors: | Colinge J.-P. Floyd L. Quinn A.J. Redmond G. Alderman J.C. Xiong W. Cleavelin C.R. Schulz T. Schruefer K. Knoblinger G. Patruno P. |
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| Affiliation: | Dept. of Electr. & Comput. Eng., Univ. of California, Davis, CA, USA; |
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| Abstract: | Trigate silicon-on-insulator (SOI) MOSFETs have been measured in the 5-400 K temperature range. The device fin width and height is 45 and 82 nm, respectively, and the p-type doping concentration in the channel is 6/spl times/10/sup 17/ cm/sup -3/. The subthreshold slope varies linearly with temperature as predicted by fully depleted SOI MOS theory. The mobility is phonon limited for temperatures larger than 100 K, while it is limited by surface roughness below that temperature. The corner effect, in which the device corners have a lower threshold voltage than the top and sidewall Si/SiO/sub 2/ interfaces, shows up at temperatures lower than 150 K. |
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