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基于新型全数字锁相环的SVG系统
引用本文:张志文,申建强,曾志兵,李高龙,吴兴阳. 基于新型全数字锁相环的SVG系统[J]. 电气传动, 2010, 40(10)
作者姓名:张志文  申建强  曾志兵  李高龙  吴兴阳
作者单位:湖南大学,电气与信息工程学院,湖南,长沙,410082
摘    要:新型全数字锁相环(AADPLL)技术在SVG系统中的运用,能实时跟踪电网频率的变化,对采样电压进行同步6倍频,实现6相同步触发脉冲,对采样电压进行同步240倍频,保证ad在每周期采样240个点,从而减少了采样误差和触发误差,使SVG实验运行系统的功率因数比未使用这项新技术之前的SVG实验系统的功率因数提高了1.5%。从而证明其有效性。

关 键 词:全数字锁相环  无功发生器  频率跟踪  

SVG System Based on AADPLL Technology
ZHANG Zhi-wen,SHEN Jian-qiang,ZENG Zhi-bing,LI Gao-long,WU Xing-yang. SVG System Based on AADPLL Technology[J]. Electric Drive, 2010, 40(10)
Authors:ZHANG Zhi-wen  SHEN Jian-qiang  ZENG Zhi-bing  LI Gao-long  WU Xing-yang
Affiliation:ZHANG Zhi-wen,SHEN Jian-qiang,ZENG Zhi-bing,LI Gao-long,WU Xing-yang(College of Electrical and Information Engineering,Hunan University,Changsha 410082,Hunan,China)
Abstract:The SVG system based on the AADPLL(advanced all digital phase-locked loop)was introduced which can make a real time tracking on the frequency of power system.It multiplies by frequency of 6 on the sampling voltage to provide of the 6 trigger pulse,and multiplies by frequency of 240 to sampling at 240 points per cycle.So it eliminates the sampling error and trigger error.Simulations and physical experiments prove that it can greatly enhance the speed and accuracy of the phase-locked and greatly improve the s...
Keywords:all digital phase-locked loop(ADPLL)  var generater  frequency tracing  
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