Highly controllable dual-gate microcrystalline silicon thin film transistor processed at low temperature (T < 180 °C)

The addition of a top-gate to a bottom gate microcrystalline silicon thin film transistor (TFT) that is processed at a maximum temperature of 180 °C, is shown to lead to a very efficient control of the threshold voltage V_TH. A real time control of CMOS pairing is then possible. The value of the coupling coefficient that is the ratio of the variation of V_TH on the variation of the voltage of the top-gate control is 0.7. This efficient control is mainly due to the use of very thin, 50 nm thick, active layer and to its electrical quality that leads to a full depletion.